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Revert "[GlobalISel] Support vectors in LegalizerHelper::narrowScalar…
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…Mul"

This reverts commit 90da0b9.

It was causing an LLVM_ENABLE_EXPENSIVE_CHECKS buildbot failure.
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@jayfoad
jayfoad committed Oct 4, 2021
1 parent 56e72a4 commit 24688f8
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Showing 3 changed files with 16 additions and 356 deletions.
26 changes: 14 additions & 12 deletions llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
View file
Expand Up @@ -5186,8 +5186,6 @@ void LegalizerHelper::multiplyRegisters(SmallVectorImpl<Register> &DstRegs,
unsigned CarrySumPrevDstIdx;
SmallVector<Register, 4> Factors;

LLT BoolTy = NarrowTy.changeElementSize(1);

for (DstIdx = 1; DstIdx < DstParts; DstIdx++) {
// Collect low parts of muls for DstIdx.
for (unsigned i = DstIdx + 1 < SrcParts ? 0 : DstIdx - SrcParts + 1;
Expand All @@ -5212,12 +5210,12 @@ void LegalizerHelper::multiplyRegisters(SmallVectorImpl<Register> &DstRegs,
// Add all factors and accumulate all carries into CarrySum.
if (DstIdx != DstParts - 1) {
MachineInstrBuilder Uaddo =
B.buildUAddo(NarrowTy, BoolTy, Factors[0], Factors[1]);
B.buildUAddo(NarrowTy, LLT::scalar(1), Factors[0], Factors[1]);
FactorSum = Uaddo.getReg(0);
CarrySum = B.buildZExt(NarrowTy, Uaddo.getReg(1)).getReg(0);
for (unsigned i = 2; i < Factors.size(); ++i) {
MachineInstrBuilder Uaddo =
B.buildUAddo(NarrowTy, BoolTy, FactorSum, Factors[i]);
B.buildUAddo(NarrowTy, LLT::scalar(1), FactorSum, Factors[i]);
FactorSum = Uaddo.getReg(0);
MachineInstrBuilder Carry = B.buildZExt(NarrowTy, Uaddo.getReg(1));
CarrySum = B.buildAdd(NarrowTy, CarrySum, Carry).getReg(0);
Expand Down Expand Up @@ -5336,25 +5334,29 @@ LegalizerHelper::narrowScalarMul(MachineInstr &MI, LLT NarrowTy) {
Register Src2 = MI.getOperand(2).getReg();

LLT Ty = MRI.getType(DstReg);
if (Ty.isVector())
return UnableToLegalize;

unsigned Size = Ty.getScalarSizeInBits();
unsigned NarrowSize = NarrowTy.getScalarSizeInBits();
if (Size % NarrowSize != 0)
unsigned SrcSize = MRI.getType(Src1).getSizeInBits();
unsigned DstSize = Ty.getSizeInBits();
unsigned NarrowSize = NarrowTy.getSizeInBits();
if (DstSize % NarrowSize != 0 || SrcSize % NarrowSize != 0)
return UnableToLegalize;

unsigned NumParts = Size / NarrowSize;
unsigned NumDstParts = DstSize / NarrowSize;
unsigned NumSrcParts = SrcSize / NarrowSize;
bool IsMulHigh = MI.getOpcode() == TargetOpcode::G_UMULH;
unsigned DstTmpParts = NumParts * (IsMulHigh ? 2 : 1);
unsigned DstTmpParts = NumDstParts * (IsMulHigh ? 2 : 1);

SmallVector<Register, 2> Src1Parts, Src2Parts;
SmallVector<Register, 2> DstTmpRegs(DstTmpParts);
extractParts(Src1, NarrowTy, NumParts, Src1Parts);
extractParts(Src2, NarrowTy, NumParts, Src2Parts);
extractParts(Src1, NarrowTy, NumSrcParts, Src1Parts);
extractParts(Src2, NarrowTy, NumSrcParts, Src2Parts);
multiplyRegisters(DstTmpRegs, Src1Parts, Src2Parts, NarrowTy);

// Take only high half of registers if this is high mul.
ArrayRef<Register> DstRegs(
IsMulHigh ? &DstTmpRegs[DstTmpParts / 2] : &DstTmpRegs[0], NumParts);
IsMulHigh ? &DstTmpRegs[DstTmpParts / 2] : &DstTmpRegs[0], NumDstParts);
MIRBuilder.buildMerge(DstReg, DstRegs);
MI.eraseFromParent();
return Legalized;
Expand Down
166 changes: 2 additions & 164 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir
View file
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=GFX8
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx906 -O0 -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=GFX9
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -global-isel-abort=0 -O0 -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=GFX8
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx906 -global-isel-abort=0 -O0 -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=GFX9

---
name: test_umulh_s32
Expand Down Expand Up @@ -122,168 +122,6 @@ body: |
$vgpr0_vgpr1 = COPY %2
...

---
name: test_umulh_v2s64
body: |
bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6_vgpr7
; GFX8-LABEL: name: test_umulh_v2s64
; GFX8: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX8: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
; GFX8: [[UV:%[0-9]+]]:_(<2 x s32>), [[UV1:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; GFX8: [[UV2:%[0-9]+]]:_(<2 x s32>), [[UV3:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
; GFX8: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](<2 x s32>)
; GFX8: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](<2 x s32>)
; GFX8: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[UV4]], [[UV6]]
; GFX8: [[MUL1:%[0-9]+]]:_(s32) = G_MUL [[UV5]], [[UV7]]
; GFX8: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](<2 x s32>)
; GFX8: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](<2 x s32>)
; GFX8: [[MUL2:%[0-9]+]]:_(s32) = G_MUL [[UV8]], [[UV10]]
; GFX8: [[MUL3:%[0-9]+]]:_(s32) = G_MUL [[UV9]], [[UV11]]
; GFX8: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](<2 x s32>)
; GFX8: [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](<2 x s32>)
; GFX8: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH [[UV12]], [[UV14]]
; GFX8: [[UMULH1:%[0-9]+]]:_(s32) = G_UMULH [[UV13]], [[UV15]]
; GFX8: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[MUL]], [[MUL2]]
; GFX8: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[MUL1]], [[MUL3]]
; GFX8: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD]](s32), [[MUL2]]
; GFX8: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD1]](s32), [[MUL3]]
; GFX8: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[UMULH]]
; GFX8: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[ADD1]], [[UMULH1]]
; GFX8: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD2]](s32), [[UMULH]]
; GFX8: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD3]](s32), [[UMULH1]]
; GFX8: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
; GFX8: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP1]](s1)
; GFX8: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP2]](s1)
; GFX8: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP3]](s1)
; GFX8: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[ZEXT]], [[ZEXT2]]
; GFX8: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[ZEXT1]], [[ZEXT3]]
; GFX8: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](<2 x s32>)
; GFX8: [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](<2 x s32>)
; GFX8: [[MUL4:%[0-9]+]]:_(s32) = G_MUL [[UV16]], [[UV18]]
; GFX8: [[MUL5:%[0-9]+]]:_(s32) = G_MUL [[UV17]], [[UV19]]
; GFX8: [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](<2 x s32>)
; GFX8: [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](<2 x s32>)
; GFX8: [[UMULH2:%[0-9]+]]:_(s32) = G_UMULH [[UV20]], [[UV22]]
; GFX8: [[UMULH3:%[0-9]+]]:_(s32) = G_UMULH [[UV21]], [[UV23]]
; GFX8: [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](<2 x s32>)
; GFX8: [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](<2 x s32>)
; GFX8: [[UMULH4:%[0-9]+]]:_(s32) = G_UMULH [[UV24]], [[UV26]]
; GFX8: [[UMULH5:%[0-9]+]]:_(s32) = G_UMULH [[UV25]], [[UV27]]
; GFX8: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[MUL4]], [[UMULH2]]
; GFX8: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[MUL5]], [[UMULH3]]
; GFX8: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD6]](s32), [[UMULH2]]
; GFX8: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD7]](s32), [[UMULH3]]
; GFX8: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[ADD6]], [[UMULH4]]
; GFX8: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[ADD7]], [[UMULH5]]
; GFX8: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD8]](s32), [[UMULH4]]
; GFX8: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD9]](s32), [[UMULH5]]
; GFX8: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP4]](s1)
; GFX8: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP5]](s1)
; GFX8: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP6]](s1)
; GFX8: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP7]](s1)
; GFX8: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[ZEXT4]], [[ZEXT6]]
; GFX8: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[ZEXT5]], [[ZEXT7]]
; GFX8: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[ADD8]], [[ADD4]]
; GFX8: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[ADD9]], [[ADD5]]
; GFX8: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[ADD12]](s32), [[ADD13]](s32)
; GFX8: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD12]](s32), [[ADD4]]
; GFX8: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD13]](s32), [[ADD5]]
; GFX8: [[ZEXT8:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP8]](s1)
; GFX8: [[ZEXT9:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP9]](s1)
; GFX8: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[ADD10]], [[ZEXT8]]
; GFX8: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[ADD11]], [[ZEXT9]]
; GFX8: [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](<2 x s32>)
; GFX8: [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](<2 x s32>)
; GFX8: [[UMULH6:%[0-9]+]]:_(s32) = G_UMULH [[UV28]], [[UV30]]
; GFX8: [[UMULH7:%[0-9]+]]:_(s32) = G_UMULH [[UV29]], [[UV31]]
; GFX8: [[ADD16:%[0-9]+]]:_(s32) = G_ADD [[UMULH6]], [[ADD14]]
; GFX8: [[ADD17:%[0-9]+]]:_(s32) = G_ADD [[UMULH7]], [[ADD15]]
; GFX8: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[ADD16]](s32), [[ADD17]](s32)
; GFX8: [[CONCAT_VECTORS:%[0-9]+]]:_(<2 x s64>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>)
; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<2 x s64>)
; GFX9-LABEL: name: test_umulh_v2s64
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
; GFX9: [[UV:%[0-9]+]]:_(<2 x s32>), [[UV1:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; GFX9: [[UV2:%[0-9]+]]:_(<2 x s32>), [[UV3:%[0-9]+]]:_(<2 x s32>) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
; GFX9: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](<2 x s32>)
; GFX9: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](<2 x s32>)
; GFX9: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[UV4]], [[UV6]]
; GFX9: [[MUL1:%[0-9]+]]:_(s32) = G_MUL [[UV5]], [[UV7]]
; GFX9: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](<2 x s32>)
; GFX9: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](<2 x s32>)
; GFX9: [[MUL2:%[0-9]+]]:_(s32) = G_MUL [[UV8]], [[UV10]]
; GFX9: [[MUL3:%[0-9]+]]:_(s32) = G_MUL [[UV9]], [[UV11]]
; GFX9: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](<2 x s32>)
; GFX9: [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](<2 x s32>)
; GFX9: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH [[UV12]], [[UV14]]
; GFX9: [[UMULH1:%[0-9]+]]:_(s32) = G_UMULH [[UV13]], [[UV15]]
; GFX9: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[MUL]], [[MUL2]]
; GFX9: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[MUL1]], [[MUL3]]
; GFX9: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD]](s32), [[MUL2]]
; GFX9: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD1]](s32), [[MUL3]]
; GFX9: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[UMULH]]
; GFX9: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[ADD1]], [[UMULH1]]
; GFX9: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD2]](s32), [[UMULH]]
; GFX9: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD3]](s32), [[UMULH1]]
; GFX9: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
; GFX9: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP1]](s1)
; GFX9: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP2]](s1)
; GFX9: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP3]](s1)
; GFX9: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[ZEXT]], [[ZEXT2]]
; GFX9: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[ZEXT1]], [[ZEXT3]]
; GFX9: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](<2 x s32>)
; GFX9: [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](<2 x s32>)
; GFX9: [[MUL4:%[0-9]+]]:_(s32) = G_MUL [[UV16]], [[UV18]]
; GFX9: [[MUL5:%[0-9]+]]:_(s32) = G_MUL [[UV17]], [[UV19]]
; GFX9: [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](<2 x s32>)
; GFX9: [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV2]](<2 x s32>)
; GFX9: [[UMULH2:%[0-9]+]]:_(s32) = G_UMULH [[UV20]], [[UV22]]
; GFX9: [[UMULH3:%[0-9]+]]:_(s32) = G_UMULH [[UV21]], [[UV23]]
; GFX9: [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](<2 x s32>)
; GFX9: [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](<2 x s32>)
; GFX9: [[UMULH4:%[0-9]+]]:_(s32) = G_UMULH [[UV24]], [[UV26]]
; GFX9: [[UMULH5:%[0-9]+]]:_(s32) = G_UMULH [[UV25]], [[UV27]]
; GFX9: [[ADD6:%[0-9]+]]:_(s32) = G_ADD [[MUL4]], [[UMULH2]]
; GFX9: [[ADD7:%[0-9]+]]:_(s32) = G_ADD [[MUL5]], [[UMULH3]]
; GFX9: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD6]](s32), [[UMULH2]]
; GFX9: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD7]](s32), [[UMULH3]]
; GFX9: [[ADD8:%[0-9]+]]:_(s32) = G_ADD [[ADD6]], [[UMULH4]]
; GFX9: [[ADD9:%[0-9]+]]:_(s32) = G_ADD [[ADD7]], [[UMULH5]]
; GFX9: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD8]](s32), [[UMULH4]]
; GFX9: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD9]](s32), [[UMULH5]]
; GFX9: [[ZEXT4:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP4]](s1)
; GFX9: [[ZEXT5:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP5]](s1)
; GFX9: [[ZEXT6:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP6]](s1)
; GFX9: [[ZEXT7:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP7]](s1)
; GFX9: [[ADD10:%[0-9]+]]:_(s32) = G_ADD [[ZEXT4]], [[ZEXT6]]
; GFX9: [[ADD11:%[0-9]+]]:_(s32) = G_ADD [[ZEXT5]], [[ZEXT7]]
; GFX9: [[ADD12:%[0-9]+]]:_(s32) = G_ADD [[ADD8]], [[ADD4]]
; GFX9: [[ADD13:%[0-9]+]]:_(s32) = G_ADD [[ADD9]], [[ADD5]]
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[ADD12]](s32), [[ADD13]](s32)
; GFX9: [[ICMP8:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD12]](s32), [[ADD4]]
; GFX9: [[ICMP9:%[0-9]+]]:_(s1) = G_ICMP intpred(ult), [[ADD13]](s32), [[ADD5]]
; GFX9: [[ZEXT8:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP8]](s1)
; GFX9: [[ZEXT9:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP9]](s1)
; GFX9: [[ADD14:%[0-9]+]]:_(s32) = G_ADD [[ADD10]], [[ZEXT8]]
; GFX9: [[ADD15:%[0-9]+]]:_(s32) = G_ADD [[ADD11]], [[ZEXT9]]
; GFX9: [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](<2 x s32>)
; GFX9: [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV3]](<2 x s32>)
; GFX9: [[UMULH6:%[0-9]+]]:_(s32) = G_UMULH [[UV28]], [[UV30]]
; GFX9: [[UMULH7:%[0-9]+]]:_(s32) = G_UMULH [[UV29]], [[UV31]]
; GFX9: [[ADD16:%[0-9]+]]:_(s32) = G_ADD [[UMULH6]], [[ADD14]]
; GFX9: [[ADD17:%[0-9]+]]:_(s32) = G_ADD [[UMULH7]], [[ADD15]]
; GFX9: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[ADD16]](s32), [[ADD17]](s32)
; GFX9: [[CONCAT_VECTORS:%[0-9]+]]:_(<2 x s64>) = G_CONCAT_VECTORS [[BUILD_VECTOR]](<2 x s32>), [[BUILD_VECTOR1]](<2 x s32>)
; GFX9: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[CONCAT_VECTORS]](<2 x s64>)
%0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%1:_(<2 x s64>) = COPY $vgpr4_vgpr5_vgpr6_vgpr7
%2:_(<2 x s64>) = G_UMULH %0, %1
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2
...

---
name: test_umulh_s16
body: |
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