[SimplifyCFG] NFC, update Switch tests as a baseline.

Also add baseline tests to show effect of later patches.

There were a couple of regressions here that were never caught,
but my patch set that this is a preparation to will fix them.

This is the third attempt to land this patch.

Differential Revision: https://reviews.llvm.org/D61150

llvm-svn: 363319

llvm/test/Transforms/SimplifyCFG/ARM/cttz-ctlz.ll

@@ -1,11 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -simplifycfg -mtriple=arm -mattr=+v6t2 < %s | FileCheck %s
 
 define i32 @ctlz(i32 %A) {
 ; CHECK-LABEL: @ctlz(
-; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
-; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %A, i1 true)
-; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[A:%.*]], 0
+; CHECK-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[A]], i1 true)
+; CHECK-NEXT:    [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL]], i32 32, i32 [[TMP0]]
+; CHECK-NEXT:    ret i32 [[SPEC_SELECT]]
+;
 entry:
   %tobool = icmp eq i32 %A, 0
   br i1 %tobool, label %cond.end, label %cond.true
@@ -21,10 +24,12 @@ cond.end:
 
 define i32 @cttz(i32 %A) {
 ; CHECK-LABEL: @cttz(
-; CHECK: [[ICMP:%[A-Za-z0-9]+]] = icmp eq i32 %A, 0
-; CHECK-NEXT: [[CTZ:%[A-Za-z0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %A, i1 true)
-; CHECK-NEXT: [[SEL:%[A-Za-z0-9.]+]] = select i1 [[ICMP]], i32 32, i32 [[CTZ]]
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[A:%.*]], 0
+; CHECK-NEXT:    [[TMP0:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[A]], i1 true)
+; CHECK-NEXT:    [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL]], i32 32, i32 [[TMP0]]
+; CHECK-NEXT:    ret i32 [[SPEC_SELECT]]
+;
 entry:
   %tobool = icmp eq i32 %A, 0
   br i1 %tobool, label %cond.end, label %cond.true

llvm/test/Transforms/SimplifyCFG/ARM/select-trunc-i64.ll

@@ -1,11 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ;RUN: opt -S -simplifycfg -mtriple=arm < %s | FileCheck %s
 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
 
-; CHECK-LABEL: select_trunc_i64
-; CHECK-NOT: br
-; CHECK: select
-; CHECK: select
 define arm_aapcscc i32 @select_trunc_i64(i32 %a, i32 %b) {
+; CHECK-LABEL: @select_trunc_i64(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
+; CHECK-NEXT:    [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
+; CHECK-NEXT:    [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i64 [[ADD]], 2147483647
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp sgt i64 [[ADD]], -2147483648
+; CHECK-NEXT:    [[COND:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 -2147483648
+; CHECK-NEXT:    [[EXTRACT_T:%.*]] = trunc i64 [[COND]] to i32
+; CHECK-NEXT:    [[COND8_OFF0:%.*]] = select i1 [[CMP]], i32 2147483647, i32 [[EXTRACT_T]]
+; CHECK-NEXT:    ret i32 [[COND8_OFF0]]
+;
 entry:
   %conv = sext i32 %a to i64
   %conv1 = sext i32 %b to i64

llvm/test/Transforms/SimplifyCFG/ARM/switch-to-lookup-table-constant-expr.ll

@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -simplifycfg < %s | FileCheck %s
 
 target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
@@ -15,11 +16,28 @@ target triple = "armv7a--none-eabi"
 @g4 = external thread_local global i32, align 4
 
 define i32* @test3(i32 %n) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    switch i32 [[N:%.*]], label [[SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i32 0, label [[RETURN:%.*]]
+; CHECK-NEXT:    i32 1, label [[SW_BB1:%.*]]
+; CHECK-NEXT:    i32 2, label [[SW_BB2:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       sw.bb1:
+; CHECK-NEXT:    br label [[RETURN]]
+; CHECK:       sw.bb2:
+; CHECK-NEXT:    br label [[RETURN]]
+; CHECK:       sw.default:
+; CHECK-NEXT:    br label [[RETURN]]
+; CHECK:       return:
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = phi i32* [ @g4, [[SW_DEFAULT]] ], [ getelementptr inbounds (i32, i32* inttoptr (i32 mul (i32 ptrtoint (i32* @g3 to i32), i32 2) to i32*), i32 1), [[SW_BB2]] ], [ @g2, [[SW_BB1]] ], [ @g1, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i32* [[RETVAL_0]]
+;
 entry:
   switch i32 %n, label %sw.default [
-    i32 0, label %sw.bb
-    i32 1, label %sw.bb1
-    i32 2, label %sw.bb2
+  i32 0, label %sw.bb
+  i32 1, label %sw.bb1
+  i32 2, label %sw.bb2
   ]
 
 sw.bb:

llvm/test/Transforms/SimplifyCFG/ARM/switch-to-lookup-table.ll

@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=static    < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
 ; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=pic       < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLE
 ; RUN: opt -S -simplifycfg -switch-to-lookup -mtriple=arm -relocation-model=ropi      < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLE
@@ -24,9 +25,9 @@ target triple = "armv7a--none-eabi"
 define i32 @test1(i32 %n) {
 entry:
   switch i32 %n, label %sw.default [
-    i32 0, label %sw.bb
-    i32 1, label %sw.bb1
-    i32 2, label %sw.bb2
+  i32 0, label %sw.bb
+  i32 1, label %sw.bb1
+  i32 2, label %sw.bb2
   ]
 
 sw.bb:
@@ -55,9 +56,9 @@ return:
 define i32* @test2(i32 %n) {
 entry:
   switch i32 %n, label %sw.default [
-    i32 0, label %sw.bb
-    i32 1, label %sw.bb1
-    i32 2, label %sw.bb2
+  i32 0, label %sw.bb
+  i32 1, label %sw.bb1
+  i32 2, label %sw.bb2
   ]
 
 sw.bb:
@@ -85,9 +86,9 @@ return:
 define i32* @test3(i32 %n) {
 entry:
   switch i32 %n, label %sw.default [
-    i32 0, label %sw.bb
-    i32 1, label %sw.bb1
-    i32 2, label %sw.bb2
+  i32 0, label %sw.bb
+  i32 1, label %sw.bb1
+  i32 2, label %sw.bb2
   ]
 
 sw.bb:

llvm/test/Transforms/SimplifyCFG/CoveredLookupTable.ll

@@ -1,28 +1,29 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -simplifycfg -switch-to-lookup -S %s | FileCheck %s
 ; RUN: opt -passes='simplify-cfg<switch-to-lookup>' -S %s | FileCheck %s
 ; rdar://15268442
 
 target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin12.0.0"
 
-; CHECK-LABEL: define i3 @coveredswitch_test(
-; CHECK: entry:
-; CHECK-NEXT: sub i3 %input, -4
-; CHECK-NEXT: zext i3 %switch.tableidx to i24
-; CHECK-NEXT: mul i24 %switch.cast, 3
-; CHECK-NEXT: lshr i24 7507338, %switch.shiftamt
-; CHECK-NEXT: trunc i24 %switch.downshift to i3
-; CHECK-NEXT: ret i3 %switch.masked
-
 define i3 @coveredswitch_test(i3 %input) {
+; CHECK-LABEL: @coveredswitch_test(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[SWITCH_TABLEIDX:%.*]] = sub i3 [[INPUT:%.*]], -4
+; CHECK-NEXT:    [[SWITCH_CAST:%.*]] = zext i3 [[SWITCH_TABLEIDX]] to i24
+; CHECK-NEXT:    [[SWITCH_SHIFTAMT:%.*]] = mul i24 [[SWITCH_CAST]], 3
+; CHECK-NEXT:    [[SWITCH_DOWNSHIFT:%.*]] = lshr i24 7507338, [[SWITCH_SHIFTAMT]]
+; CHECK-NEXT:    [[SWITCH_MASKED:%.*]] = trunc i24 [[SWITCH_DOWNSHIFT]] to i3
+; CHECK-NEXT:    ret i3 [[SWITCH_MASKED]]
+;
 entry:
   switch i3 %input, label %bb8 [
-    i3 0, label %bb7
-    i3 1, label %bb
-    i3 2, label %bb3
-    i3 3, label %bb4
-    i3 4, label %bb5
-    i3 5, label %bb6
+  i3 0, label %bb7
+  i3 1, label %bb
+  i3 2, label %bb3
+  i3 3, label %bb4
+  i3 4, label %bb5
+  i3 5, label %bb6
   ]
 
 bb:                                               ; preds = %entry

llvm/test/Transforms/SimplifyCFG/X86/disable-lookup-table.ll

@@ -1,19 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -simplifycfg -switch-to-lookup -S -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
 ; RUN: opt < %s -passes='simplify-cfg<switch-to-lookup>' -S -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
 
 ; In the presence of "-no-jump-tables"="true", simplifycfg should not convert switches to lookup tables.
 
-; CHECK: @switch.table.bar = private unnamed_addr constant [4 x i32] [i32 55, i32 123, i32 0, i32 -1]
-; CHECK-LABEL: foo
-; CHECK-NOT: @switch.table.foo = private unnamed_addr constant [4 x i32] [i32 55, i32 123, i32 0, i32 -1]
-
 define i32 @foo(i32 %c) "no-jump-tables"="true" {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    switch i32 [[C:%.*]], label [[SW_DEFAULT:%.*]] [
+; CHECK-NEXT:    i32 42, label [[RETURN:%.*]]
+; CHECK-NEXT:    i32 43, label [[SW_BB1:%.*]]
+; CHECK-NEXT:    i32 44, label [[SW_BB2:%.*]]
+; CHECK-NEXT:    i32 45, label [[SW_BB3:%.*]]
+; CHECK-NEXT:    ]
+; CHECK:       sw.bb1:
+; CHECK-NEXT:    br label [[RETURN]]
+; CHECK:       sw.bb2:
+; CHECK-NEXT:    br label [[RETURN]]
+; CHECK:       sw.bb3:
+; CHECK-NEXT:    br label [[RETURN]]
+; CHECK:       sw.default:
+; CHECK-NEXT:    br label [[RETURN]]
+; CHECK:       return:
+; CHECK-NEXT:    [[RETVAL_0:%.*]] = phi i32 [ 15, [[SW_DEFAULT]] ], [ -1, [[SW_BB3]] ], [ 0, [[SW_BB2]] ], [ 123, [[SW_BB1]] ], [ 55, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    ret i32 [[RETVAL_0]]
+;
 entry:
   switch i32 %c, label %sw.default [
-    i32 42, label %return
-    i32 43, label %sw.bb1
-    i32 44, label %sw.bb2
-    i32 45, label %sw.bb3
+  i32 42, label %return
+  i32 43, label %sw.bb1
+  i32 44, label %sw.bb2
+  i32 45, label %sw.bb3
   ]
 
 sw.bb1: br label %return
@@ -27,12 +44,24 @@ return:
 
 
 define i32 @bar(i32 %c) {
+; CHECK-LABEL: @bar(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[SWITCH_TABLEIDX:%.*]] = sub i32 [[C:%.*]], 42
+; CHECK-NEXT:    [[TMP0:%.*]] = icmp ult i32 [[SWITCH_TABLEIDX]], 4
+; CHECK-NEXT:    br i1 [[TMP0]], label [[SWITCH_LOOKUP:%.*]], label [[RETURN:%.*]]
+; CHECK:       switch.lookup:
+; CHECK-NEXT:    [[SWITCH_GEP:%.*]] = getelementptr inbounds [4 x i32], [4 x i32]* @switch.table.bar, i32 0, i32 [[SWITCH_TABLEIDX]]
+; CHECK-NEXT:    [[SWITCH_LOAD:%.*]] = load i32, i32* [[SWITCH_GEP]]
+; CHECK-NEXT:    ret i32 [[SWITCH_LOAD]]
+; CHECK:       return:
+; CHECK-NEXT:    ret i32 15
+;
 entry:
   switch i32 %c, label %sw.default [
-    i32 42, label %return
-    i32 43, label %sw.bb1
-    i32 44, label %sw.bb2
-    i32 45, label %sw.bb3
+  i32 42, label %return
+  i32 43, label %sw.bb1
+  i32 44, label %sw.bb2
+  i32 45, label %sw.bb3
   ]
 
 sw.bb1: br label %return