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[WebAssembly] Fix ISel crash in SIGN_EXTEND_INREG lowering
Summary: The code previously assumed that the index of a vector extract was constant, but this was not always true. This patch fixes the problem by bailing out of the lowering if the index is nonconstant and also replaces `static_cast`s in the lowering function with `cast`s because the latter contain type-checking asserts that would make similar issues easier to find and debug. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D81025
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; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mattr=+simd128 | FileCheck %s | ||
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; A regression test for a bug in the lowering of SIGN_EXTEND_INREG | ||
; with SIMD and without sign-ext where ISel would crash if the index | ||
; of the vector extract was not a constant. | ||
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" | ||
target triple = "wasm32" | ||
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; CHECK-LABEL: foo: | ||
; CHECK-NEXT: .functype foo () -> (f32) | ||
; CHECK: i32x4.load16x4_u | ||
; CHECK: f32.convert_i32_s | ||
define float @foo() { | ||
%1 = load <4 x i16>, <4 x i16>* undef, align 8 | ||
%2 = load i32, i32* undef, align 4 | ||
%vecext = extractelement <4 x i16> %1, i32 %2 | ||
%conv = sitofp i16 %vecext to float | ||
ret float %conv | ||
} |