Skip to content

Commit

Permalink
[TypePromotion] Convert tests to opaque pointers (NFC)
Browse files Browse the repository at this point in the history
  • Loading branch information
nikic committed Jan 4, 2023
1 parent 4c3e25d commit 28f21ca
Show file tree
Hide file tree
Showing 15 changed files with 553 additions and 575 deletions.
218 changes: 109 additions & 109 deletions llvm/test/Transforms/TypePromotion/AArch64/convert-utf.ll

Large diffs are not rendered by default.

100 changes: 50 additions & 50 deletions llvm/test/Transforms/TypePromotion/AArch64/loops.ll
Expand Up @@ -3,19 +3,19 @@

target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"

define dso_local i32 @ic_strcmp(i8* nocapture readonly %arg, i8* nocapture readonly %arg1) {
define dso_local i32 @ic_strcmp(ptr nocapture readonly %arg, ptr nocapture readonly %arg1) {
; CHECK-LABEL: @ic_strcmp(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[I:%.*]] = load i8, i8* [[ARG:%.*]], align 1
; CHECK-NEXT: [[I:%.*]] = load i8, ptr [[ARG:%.*]], align 1
; CHECK-NEXT: [[TMP0:%.*]] = zext i8 [[I]] to i32
; CHECK-NEXT: [[I2:%.*]] = icmp eq i32 [[TMP0]], 0
; CHECK-NEXT: br i1 [[I2]], label [[BB25:%.*]], label [[BB3:%.*]]
; CHECK: bb3:
; CHECK-NEXT: [[I4:%.*]] = phi i64 [ [[I16:%.*]], [[BB15:%.*]] ], [ 0, [[BB:%.*]] ]
; CHECK-NEXT: [[I5:%.*]] = phi i32 [ [[TMP2:%.*]], [[BB15]] ], [ [[TMP0]], [[BB]] ]
; CHECK-NEXT: [[I6:%.*]] = phi i32 [ [[I17:%.*]], [[BB15]] ], [ 0, [[BB]] ]
; CHECK-NEXT: [[I7:%.*]] = getelementptr inbounds i8, i8* [[ARG1:%.*]], i64 [[I4]]
; CHECK-NEXT: [[I8:%.*]] = load i8, i8* [[I7]], align 1
; CHECK-NEXT: [[I7:%.*]] = getelementptr inbounds i8, ptr [[ARG1:%.*]], i64 [[I4]]
; CHECK-NEXT: [[I8:%.*]] = load i8, ptr [[I7]], align 1
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[I8]] to i32
; CHECK-NEXT: [[I9:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[I9]], label [[BB23:%.*]], label [[BB10:%.*]]
Expand All @@ -28,8 +28,8 @@ define dso_local i32 @ic_strcmp(i8* nocapture readonly %arg, i8* nocapture reado
; CHECK: bb15:
; CHECK-NEXT: [[I16]] = add nuw i64 [[I4]], 1
; CHECK-NEXT: [[I17]] = add nuw nsw i32 [[I6]], 1
; CHECK-NEXT: [[I18:%.*]] = getelementptr inbounds i8, i8* [[ARG]], i64 [[I16]]
; CHECK-NEXT: [[I19:%.*]] = load i8, i8* [[I18]], align 1
; CHECK-NEXT: [[I18:%.*]] = getelementptr inbounds i8, ptr [[ARG]], i64 [[I16]]
; CHECK-NEXT: [[I19:%.*]] = load i8, ptr [[I18]], align 1
; CHECK-NEXT: [[TMP2]] = zext i8 [[I19]] to i32
; CHECK-NEXT: [[I20:%.*]] = icmp eq i32 [[TMP2]], 0
; CHECK-NEXT: br i1 [[I20]], label [[BB25]], label [[BB3]]
Expand All @@ -43,8 +43,8 @@ define dso_local i32 @ic_strcmp(i8* nocapture readonly %arg, i8* nocapture reado
; CHECK-NEXT: [[I26:%.*]] = phi i32 [ 0, [[BB]] ], [ [[I22]], [[BB21]] ], [ [[I24]], [[BB23]] ], [ [[I17]], [[BB15]] ]
; CHECK-NEXT: [[I27:%.*]] = phi i32 [ 0, [[BB]] ], [ [[I5]], [[BB21]] ], [ [[I5]], [[BB23]] ], [ 0, [[BB15]] ]
; CHECK-NEXT: [[I28:%.*]] = zext i32 [[I26]] to i64
; CHECK-NEXT: [[I29:%.*]] = getelementptr inbounds i8, i8* [[ARG1]], i64 [[I28]]
; CHECK-NEXT: [[I30:%.*]] = load i8, i8* [[I29]], align 1
; CHECK-NEXT: [[I29:%.*]] = getelementptr inbounds i8, ptr [[ARG1]], i64 [[I28]]
; CHECK-NEXT: [[I30:%.*]] = load i8, ptr [[I29]], align 1
; CHECK-NEXT: [[TMP3:%.*]] = zext i8 [[I30]] to i32
; CHECK-NEXT: [[I31:%.*]] = icmp eq i32 [[I27]], [[TMP3]]
; CHECK-NEXT: [[I32:%.*]] = or i32 [[I27]], 32
Expand All @@ -55,16 +55,16 @@ define dso_local i32 @ic_strcmp(i8* nocapture readonly %arg, i8* nocapture reado
; CHECK-NEXT: ret i32 [[I36]]
;
bb:
%i = load i8, i8* %arg, align 1
%i = load i8, ptr %arg, align 1
%i2 = icmp eq i8 %i, 0
br i1 %i2, label %bb25, label %bb3

bb3: ; preds = %bb15, %bb
%i4 = phi i64 [ %i16, %bb15 ], [ 0, %bb ]
%i5 = phi i8 [ %i19, %bb15 ], [ %i, %bb ]
%i6 = phi i32 [ %i17, %bb15 ], [ 0, %bb ]
%i7 = getelementptr inbounds i8, i8* %arg1, i64 %i4
%i8 = load i8, i8* %i7, align 1
%i7 = getelementptr inbounds i8, ptr %arg1, i64 %i4
%i8 = load i8, ptr %i7, align 1
%i9 = icmp eq i8 %i8, 0
br i1 %i9, label %bb23, label %bb10

Expand All @@ -78,8 +78,8 @@ bb10: ; preds = %bb3
bb15: ; preds = %bb10
%i16 = add nuw i64 %i4, 1
%i17 = add nuw nsw i32 %i6, 1
%i18 = getelementptr inbounds i8, i8* %arg, i64 %i16
%i19 = load i8, i8* %i18, align 1
%i18 = getelementptr inbounds i8, ptr %arg, i64 %i16
%i19 = load i8, ptr %i18, align 1
%i20 = icmp eq i8 %i19, 0
br i1 %i20, label %bb25, label %bb3

Expand All @@ -95,8 +95,8 @@ bb25: ; preds = %bb23, %bb21, %bb15,
%i26 = phi i32 [ 0, %bb ], [ %i22, %bb21 ], [ %i24, %bb23 ], [ %i17, %bb15 ]
%i27 = phi i8 [ 0, %bb ], [ %i5, %bb21 ], [ %i5, %bb23 ], [ 0, %bb15 ]
%i28 = zext i32 %i26 to i64
%i29 = getelementptr inbounds i8, i8* %arg1, i64 %i28
%i30 = load i8, i8* %i29, align 1
%i29 = getelementptr inbounds i8, ptr %arg1, i64 %i28
%i30 = load i8, ptr %i29, align 1
%i31 = icmp eq i8 %i27, %i30
%i32 = or i8 %i27, 32
%i33 = or i8 %i30, 32
Expand All @@ -106,10 +106,10 @@ bb25: ; preds = %bb23, %bb21, %bb15,
ret i32 %i36
}

define dso_local i16 @i16_loop_add_i8(i8* nocapture readonly %arg) {
define dso_local i16 @i16_loop_add_i8(ptr nocapture readonly %arg) {
; CHECK-LABEL: @i16_loop_add_i8(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[I:%.*]] = load i8, i8* [[ARG:%.*]], align 1
; CHECK-NEXT: [[I:%.*]] = load i8, ptr [[ARG:%.*]], align 1
; CHECK-NEXT: [[TMP0:%.*]] = zext i8 [[I]] to i32
; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
; CHECK-NEXT: [[I1:%.*]] = zext i8 [[TMP1]] to i16
Expand All @@ -121,8 +121,8 @@ define dso_local i16 @i16_loop_add_i8(i8* nocapture readonly %arg) {
; CHECK-NEXT: [[I6:%.*]] = phi i16 [ [[I12:%.*]], [[BB4]] ], [ [[I1]], [[BB]] ]
; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i8, i8* [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i8, i8* [[I9]], align 1
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i8, ptr [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i8, ptr [[I9]], align 1
; CHECK-NEXT: [[I11:%.*]] = zext i8 [[I10]] to i16
; CHECK-NEXT: [[I12]] = add nuw nsw i16 [[I6]], [[I11]]
; CHECK-NEXT: [[I13:%.*]] = icmp ne i8 [[I10]], 0
Expand All @@ -134,7 +134,7 @@ define dso_local i16 @i16_loop_add_i8(i8* nocapture readonly %arg) {
; CHECK-NEXT: ret i16 [[I17]]
;
bb:
%i = load i8, i8* %arg, align 1
%i = load i8, ptr %arg, align 1
%i1 = zext i8 %i to i16
%i2 = add i8 %i, -1
%i3 = icmp ult i8 %i2, 31
Expand All @@ -145,8 +145,8 @@ bb4: ; preds = %bb4, %bb
%i6 = phi i16 [ %i12, %bb4 ], [ %i1, %bb ]
%i7 = add i32 %i5, 1
%i8 = zext i32 %i7 to i64
%i9 = getelementptr inbounds i8, i8* %arg, i64 %i8
%i10 = load i8, i8* %i9, align 1
%i9 = getelementptr inbounds i8, ptr %arg, i64 %i8
%i10 = load i8, ptr %i9, align 1
%i11 = zext i8 %i10 to i16
%i12 = add nuw nsw i16 %i6, %i11
%i13 = icmp ne i8 %i10, 0
Expand All @@ -159,10 +159,10 @@ bb16: ; preds = %bb4, %bb
ret i16 %i17
}

define dso_local i32 @i32_loop_add_i16(i16* nocapture readonly %arg) {
define dso_local i32 @i32_loop_add_i16(ptr nocapture readonly %arg) {
; CHECK-LABEL: @i32_loop_add_i16(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[I:%.*]] = load i16, i16* [[ARG:%.*]], align 2
; CHECK-NEXT: [[I:%.*]] = load i16, ptr [[ARG:%.*]], align 2
; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[I]] to i32
; CHECK-NEXT: [[I1:%.*]] = zext i16 [[I]] to i32
; CHECK-NEXT: [[I2:%.*]] = add i32 [[TMP0]], -1
Expand All @@ -173,8 +173,8 @@ define dso_local i32 @i32_loop_add_i16(i16* nocapture readonly %arg) {
; CHECK-NEXT: [[I6:%.*]] = phi i32 [ [[I12:%.*]], [[BB4]] ], [ [[I1]], [[BB]] ]
; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, i16* [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i16, i16* [[I9]], align 2
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, ptr [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i16, ptr [[I9]], align 2
; CHECK-NEXT: [[I11:%.*]] = zext i16 [[I10]] to i32
; CHECK-NEXT: [[I12]] = sub nsw i32 [[I6]], [[I11]]
; CHECK-NEXT: [[I13:%.*]] = icmp ne i16 [[I10]], 0
Expand All @@ -186,7 +186,7 @@ define dso_local i32 @i32_loop_add_i16(i16* nocapture readonly %arg) {
; CHECK-NEXT: ret i32 [[I17]]
;
bb:
%i = load i16, i16* %arg, align 2
%i = load i16, ptr %arg, align 2
%i1 = zext i16 %i to i32
%i2 = add i16 %i, -1
%i3 = icmp ult i16 %i2, 31
Expand All @@ -197,8 +197,8 @@ bb4: ; preds = %bb4, %bb
%i6 = phi i32 [ %i12, %bb4 ], [ %i1, %bb ]
%i7 = add i32 %i5, 1
%i8 = zext i32 %i7 to i64
%i9 = getelementptr inbounds i16, i16* %arg, i64 %i8
%i10 = load i16, i16* %i9, align 2
%i9 = getelementptr inbounds i16, ptr %arg, i64 %i8
%i10 = load i16, ptr %i9, align 2
%i11 = zext i16 %i10 to i32
%i12 = sub nsw i32 %i6, %i11
%i13 = icmp ne i16 %i10, 0
Expand All @@ -211,10 +211,10 @@ bb16: ; preds = %bb4, %bb
ret i32 %i17
}

define dso_local i32 @i16_loop_add_i16(i16* nocapture readonly %arg) {
define dso_local i32 @i16_loop_add_i16(ptr nocapture readonly %arg) {
; CHECK-LABEL: @i16_loop_add_i16(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[I:%.*]] = load i16, i16* [[ARG:%.*]], align 2
; CHECK-NEXT: [[I:%.*]] = load i16, ptr [[ARG:%.*]], align 2
; CHECK-NEXT: [[I1:%.*]] = icmp ne i16 [[I]], 0
; CHECK-NEXT: [[I2:%.*]] = icmp slt i16 [[I]], 32
; CHECK-NEXT: [[I3:%.*]] = and i1 [[I1]], [[I2]]
Expand All @@ -224,8 +224,8 @@ define dso_local i32 @i16_loop_add_i16(i16* nocapture readonly %arg) {
; CHECK-NEXT: [[I6:%.*]] = phi i16 [ [[I11:%.*]], [[BB4]] ], [ [[I]], [[BB]] ]
; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, i16* [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i16, i16* [[I9]], align 2
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, ptr [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i16, ptr [[I9]], align 2
; CHECK-NEXT: [[I11]] = sub i16 [[I6]], [[I10]]
; CHECK-NEXT: [[I12:%.*]] = icmp ne i16 [[I10]], 0
; CHECK-NEXT: [[I13:%.*]] = icmp slt i16 [[I11]], 32
Expand All @@ -237,7 +237,7 @@ define dso_local i32 @i16_loop_add_i16(i16* nocapture readonly %arg) {
; CHECK-NEXT: ret i32 [[I17]]
;
bb:
%i = load i16, i16* %arg, align 2
%i = load i16, ptr %arg, align 2
%i1 = icmp ne i16 %i, 0
%i2 = icmp slt i16 %i, 32
%i3 = and i1 %i1, %i2
Expand All @@ -248,8 +248,8 @@ bb4: ; preds = %bb4, %bb
%i6 = phi i16 [ %i11, %bb4 ], [ %i, %bb ]
%i7 = add i32 %i5, 1
%i8 = zext i32 %i7 to i64
%i9 = getelementptr inbounds i16, i16* %arg, i64 %i8
%i10 = load i16, i16* %i9, align 2
%i9 = getelementptr inbounds i16, ptr %arg, i64 %i8
%i10 = load i16, ptr %i9, align 2
%i11 = sub i16 %i6, %i10
%i12 = icmp ne i16 %i10, 0
%i13 = icmp slt i16 %i11, 32
Expand All @@ -262,10 +262,10 @@ bb15: ; preds = %bb4, %bb
ret i32 %i17
}

define dso_local i32 @i16_loop_sub_i16(i16* nocapture readonly %arg) {
define dso_local i32 @i16_loop_sub_i16(ptr nocapture readonly %arg) {
; CHECK-LABEL: @i16_loop_sub_i16(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[I:%.*]] = load i16, i16* [[ARG:%.*]], align 2
; CHECK-NEXT: [[I:%.*]] = load i16, ptr [[ARG:%.*]], align 2
; CHECK-NEXT: [[I1:%.*]] = icmp ne i16 [[I]], 0
; CHECK-NEXT: [[I2:%.*]] = icmp slt i16 [[I]], 32
; CHECK-NEXT: [[I3:%.*]] = and i1 [[I1]], [[I2]]
Expand All @@ -275,8 +275,8 @@ define dso_local i32 @i16_loop_sub_i16(i16* nocapture readonly %arg) {
; CHECK-NEXT: [[I6:%.*]] = phi i16 [ [[I11:%.*]], [[BB4]] ], [ [[I]], [[BB]] ]
; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, i16* [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i16, i16* [[I9]], align 2
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, ptr [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i16, ptr [[I9]], align 2
; CHECK-NEXT: [[I11]] = sub i16 [[I6]], [[I10]]
; CHECK-NEXT: [[I12:%.*]] = icmp ne i16 [[I10]], 0
; CHECK-NEXT: [[I13:%.*]] = icmp slt i16 [[I11]], 32
Expand All @@ -288,7 +288,7 @@ define dso_local i32 @i16_loop_sub_i16(i16* nocapture readonly %arg) {
; CHECK-NEXT: ret i32 [[I17]]
;
bb:
%i = load i16, i16* %arg, align 2
%i = load i16, ptr %arg, align 2
%i1 = icmp ne i16 %i, 0
%i2 = icmp slt i16 %i, 32
%i3 = and i1 %i1, %i2
Expand All @@ -299,8 +299,8 @@ bb4: ; preds = %bb4, %bb
%i6 = phi i16 [ %i11, %bb4 ], [ %i, %bb ]
%i7 = add i32 %i5, 1
%i8 = zext i32 %i7 to i64
%i9 = getelementptr inbounds i16, i16* %arg, i64 %i8
%i10 = load i16, i16* %i9, align 2
%i9 = getelementptr inbounds i16, ptr %arg, i64 %i8
%i10 = load i16, ptr %i9, align 2
%i11 = sub i16 %i6, %i10
%i12 = icmp ne i16 %i10, 0
%i13 = icmp slt i16 %i11, 32
Expand All @@ -313,10 +313,10 @@ bb15: ; preds = %bb4, %bb
ret i32 %i17
}

define dso_local i32 @i32_loop_sub_i16(i16* nocapture readonly %arg) {
define dso_local i32 @i32_loop_sub_i16(ptr nocapture readonly %arg) {
; CHECK-LABEL: @i32_loop_sub_i16(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[I:%.*]] = load i16, i16* [[ARG:%.*]], align 2
; CHECK-NEXT: [[I:%.*]] = load i16, ptr [[ARG:%.*]], align 2
; CHECK-NEXT: [[TMP0:%.*]] = zext i16 [[I]] to i32
; CHECK-NEXT: [[I1:%.*]] = zext i16 [[I]] to i32
; CHECK-NEXT: [[I2:%.*]] = add i32 [[TMP0]], -1
Expand All @@ -327,8 +327,8 @@ define dso_local i32 @i32_loop_sub_i16(i16* nocapture readonly %arg) {
; CHECK-NEXT: [[I6:%.*]] = phi i32 [ [[I12:%.*]], [[BB4]] ], [ [[I1]], [[BB]] ]
; CHECK-NEXT: [[I7]] = add i32 [[I5]], 1
; CHECK-NEXT: [[I8:%.*]] = zext i32 [[I7]] to i64
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, i16* [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i16, i16* [[I9]], align 2
; CHECK-NEXT: [[I9:%.*]] = getelementptr inbounds i16, ptr [[ARG]], i64 [[I8]]
; CHECK-NEXT: [[I10:%.*]] = load i16, ptr [[I9]], align 2
; CHECK-NEXT: [[I11:%.*]] = zext i16 [[I10]] to i32
; CHECK-NEXT: [[I12]] = sub nsw i32 [[I6]], [[I11]]
; CHECK-NEXT: [[I13:%.*]] = icmp ne i16 [[I10]], 0
Expand All @@ -340,7 +340,7 @@ define dso_local i32 @i32_loop_sub_i16(i16* nocapture readonly %arg) {
; CHECK-NEXT: ret i32 [[I17]]
;
bb:
%i = load i16, i16* %arg, align 2
%i = load i16, ptr %arg, align 2
%i1 = zext i16 %i to i32
%i2 = add i16 %i, -1
%i3 = icmp ult i16 %i2, 31
Expand All @@ -351,8 +351,8 @@ bb4: ; preds = %bb4, %bb
%i6 = phi i32 [ %i12, %bb4 ], [ %i1, %bb ]
%i7 = add i32 %i5, 1
%i8 = zext i32 %i7 to i64
%i9 = getelementptr inbounds i16, i16* %arg, i64 %i8
%i10 = load i16, i16* %i9, align 2
%i9 = getelementptr inbounds i16, ptr %arg, i64 %i8
%i10 = load i16, ptr %i9, align 2
%i11 = zext i16 %i10 to i32
%i12 = sub nsw i32 %i6, %i11
%i13 = icmp ne i16 %i10, 0
Expand Down
14 changes: 7 additions & 7 deletions llvm/test/Transforms/TypePromotion/AArch64/phi-zext-gep.ll
Expand Up @@ -3,10 +3,10 @@

target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"

define dso_local i32 @avoid_trunc_gep(i8* nocapture readonly %ip) {
define dso_local i32 @avoid_trunc_gep(ptr nocapture readonly %ip) {
; CHECK-LABEL: @avoid_trunc_gep(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TAG_0_IN8:%.*]] = load i8, i8* [[IP:%.*]], align 1
; CHECK-NEXT: [[TAG_0_IN8:%.*]] = load i8, ptr [[IP:%.*]], align 1
; CHECK-NEXT: [[TMP0:%.*]] = zext i8 [[TAG_0_IN8]] to i32
; CHECK-NEXT: [[CMP9:%.*]] = icmp ult i32 [[TMP0]], 100
; CHECK-NEXT: br i1 [[CMP9]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
Expand All @@ -15,8 +15,8 @@ define dso_local i32 @avoid_trunc_gep(i8* nocapture readonly %ip) {
; CHECK: for.body:
; CHECK-NEXT: [[TAG_0_IN10:%.*]] = phi i32 [ [[TMP1:%.*]], [[FOR_BODY]] ], [ [[TMP0]], [[FOR_BODY_PREHEADER]] ]
; CHECK-NEXT: [[TAG_0:%.*]] = zext i32 [[TAG_0_IN10]] to i64
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, i8* [[IP]], i64 [[TAG_0]]
; CHECK-NEXT: [[TAG_0_IN:%.*]] = load i8, i8* [[ARRAYIDX]], align 1
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr [[IP]], i64 [[TAG_0]]
; CHECK-NEXT: [[TAG_0_IN:%.*]] = load i8, ptr [[ARRAYIDX]], align 1
; CHECK-NEXT: [[TMP1]] = zext i8 [[TAG_0_IN]] to i32
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP1]], 100
; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
Expand All @@ -27,7 +27,7 @@ define dso_local i32 @avoid_trunc_gep(i8* nocapture readonly %ip) {
; CHECK-NEXT: ret i32 [[TAG_0_IN_LCSSA]]
;
entry:
%tag.0.in8 = load i8, i8* %ip, align 1
%tag.0.in8 = load i8, ptr %ip, align 1
%cmp9 = icmp ult i8 %tag.0.in8, 100
br i1 %cmp9, label %for.body.preheader, label %for.end

Expand All @@ -37,8 +37,8 @@ for.body.preheader: ; preds = %entry
for.body: ; preds = %for.body.preheader, %for.body
%tag.0.in10 = phi i8 [ %tag.0.in, %for.body ], [ %tag.0.in8, %for.body.preheader ]
%tag.0 = zext i8 %tag.0.in10 to i64
%arrayidx = getelementptr inbounds i8, i8* %ip, i64 %tag.0
%tag.0.in = load i8, i8* %arrayidx, align 1
%arrayidx = getelementptr inbounds i8, ptr %ip, i64 %tag.0
%tag.0.in = load i8, ptr %arrayidx, align 1
%cmp = icmp ult i8 %tag.0.in, 100
br i1 %cmp, label %for.body, label %for.end.loopexit

Expand Down

0 comments on commit 28f21ca

Please sign in to comment.