Skip to content

Commit

Permalink
[PowerPC] Add support for intrinsics dcbfps and dcbstps in P10.
Browse files Browse the repository at this point in the history
Summary: This patch added support for the intrinsics llvm.ppc.dcbfps and llvm.ppc.dcbstps.
dcbfps and dcbstps are actually extended mnemonics of dcbf.
dcbfps RA,RB ---> dcbf RA,RB,4
dcbstps RA,RB ---> dcbf RA,RB,6

Reviewed By: amyk, steven.zhang

Differential Revision: https://reviews.llvm.org/D91323
  • Loading branch information
EsmeYi committed Dec 7, 2020
1 parent c11d868 commit 28fdeea
Show file tree
Hide file tree
Showing 5 changed files with 70 additions and 9 deletions.
10 changes: 6 additions & 4 deletions llvm/include/llvm/IR/IntrinsicsPowerPC.td
Expand Up @@ -18,10 +18,12 @@
let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.".
// dcba/dcbf/dcbi/dcbst/dcbt/dcbz/dcbzl(PPC970) instructions.
def int_ppc_dcba : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbf : GCCBuiltin<"__builtin_dcbf">,
Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbfl : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbflp: Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbf : GCCBuiltin<"__builtin_dcbf">,
Intrinsic<[], [llvm_ptr_ty], [IntrArgMemOnly]>;
def int_ppc_dcbfl : Intrinsic<[], [llvm_ptr_ty], [IntrArgMemOnly]>;
def int_ppc_dcbflp : Intrinsic<[], [llvm_ptr_ty], [IntrArgMemOnly]>;
def int_ppc_dcbfps : Intrinsic<[], [llvm_ptr_ty], [IntrArgMemOnly]>;
def int_ppc_dcbstps : Intrinsic<[], [llvm_ptr_ty], [IntrArgMemOnly]>;
def int_ppc_dcbi : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbst : Intrinsic<[], [llvm_ptr_ty], []>;
def int_ppc_dcbt : Intrinsic<[], [llvm_ptr_ty],
Expand Down
8 changes: 7 additions & 1 deletion llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
Expand Up @@ -774,12 +774,18 @@ void PPCAsmParser::ProcessInstruction(MCInst &Inst,
}
case PPC::DCBFx:
case PPC::DCBFL:
case PPC::DCBFLP: {
case PPC::DCBFLP:
case PPC::DCBFPS:
case PPC::DCBSTPS: {
int L = 0;
if (Opcode == PPC::DCBFL)
L = 1;
else if (Opcode == PPC::DCBFLP)
L = 3;
else if (Opcode == PPC::DCBFPS)
L = 4;
else if (Opcode == PPC::DCBSTPS)
L = 6;

MCInst TmpInst;
TmpInst.setOpcode(PPC::DCBF);
Expand Down
14 changes: 10 additions & 4 deletions llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
Expand Up @@ -184,12 +184,18 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t Address,

if (MI->getOpcode() == PPC::DCBF) {
unsigned char L = MI->getOperand(0).getImm();
if (!L || L == 1 || L == 3) {
O << "\tdcbf";
if (L == 1 || L == 3)
if (!L || L == 1 || L == 3 || L == 4 || L == 6) {
O << "\tdcb";
if (L != 6)
O << "f";
if (L == 1)
O << "l";
if (L == 3)
O << "p";
O << "lp";
if (L == 4)
O << "ps";
if (L == 6)
O << "stps";
O << " ";

printOperand(MI, 1, O);
Expand Down
10 changes: 10 additions & 0 deletions llvm/lib/Target/PowerPC/PPCInstrInfo.td
Expand Up @@ -4609,6 +4609,16 @@ def : Pat<(int_ppc_dcbfl xoaddr:$dst),
def : Pat<(int_ppc_dcbflp xoaddr:$dst),
(DCBF 3, xoaddr:$dst)>;

let Predicates = [IsISA3_1] in {
def DCBFPS : PPCAsmPseudo<"dcbfps $dst", (ins memrr:$dst)>;
def DCBSTPS : PPCAsmPseudo<"dcbstps $dst", (ins memrr:$dst)>;

def : Pat<(int_ppc_dcbfps xoaddr:$dst),
(DCBF 4, xoaddr:$dst)>;
def : Pat<(int_ppc_dcbstps xoaddr:$dst),
(DCBF 6, xoaddr:$dst)>;
}

def : InstAlias<"crset $bx", (CREQV crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>;
def : InstAlias<"crclr $bx", (CRXOR crbitrc:$bx, crbitrc:$bx, crbitrc:$bx)>;
def : InstAlias<"crmove $bx, $by", (CROR crbitrc:$bx, crbitrc:$by, crbitrc:$by)>;
Expand Down
37 changes: 37 additions & 0 deletions llvm/test/CodeGen/PowerPC/dcbf-p10.ll
@@ -0,0 +1,37 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu < %s \
; RUN: -verify-machineinstrs -ppc-asm-full-reg-names \
; RUN: -ppc-vsr-nums-as-vr -mcpu=pwr10 | FileCheck %s
; RUN: llc -mtriple=powerpc64-unknown-linux-gnu < %s \
; RUN: -verify-machineinstrs -ppc-asm-full-reg-names \
; RUN: -ppc-vsr-nums-as-vr -mcpu=pwr10 | FileCheck %s

; Function Attrs: nounwind
define void @dcbfps_test(i8* %a) {
; CHECK-LABEL: dcbfps_test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi r3, r3, 3
; CHECK-NEXT: dcbfps 0, r3
; CHECK-NEXT: blr
entry:
%add.a = getelementptr inbounds i8, i8* %a, i64 3
tail call void @llvm.ppc.dcbfps(i8* %add.a)
ret void
}

declare void @llvm.ppc.dcbfps(i8*)

; Function Attrs: nounwind
define void @dcbstps_test(i8* %a) {
; CHECK-LABEL: dcbstps_test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi r3, r3, 3
; CHECK-NEXT: dcbstps 0, r3
; CHECK-NEXT: blr
entry:
%add.a = getelementptr inbounds i8, i8* %a, i64 3
tail call void @llvm.ppc.dcbstps(i8* %add.a)
ret void
}

declare void @llvm.ppc.dcbstps(i8*)

0 comments on commit 28fdeea

Please sign in to comment.