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[Clang][LLVM][SVE2.1] Created intrinsics for DUPQ instr. (#83260)
This patch adds clang and llvm support for following intrinsic and maps it to DUPQ instruction: ``` // Variants are also available for: // _s8, _u16, _s16, _u32, _s32, _u64, _s64 // _bf16, _f16, _f32, _f64 svuint8_t svdup_laneq[_u8](svuint8_t zn, uint64_t imm_idx); ```
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clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_dupq.c
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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2 | ||
// REQUIRES: aarch64-registered-target | ||
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -target-feature +bf16\ | ||
// RUN: -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s | ||
// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2p1 -target-feature +bf16\ | ||
// RUN: -S -Werror -emit-llvm -disable-O0-optnone -o - %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s | ||
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -target-feature +bf16\ | ||
// RUN: -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK | ||
// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2p1 -target-feature +bf16\ | ||
// RUN: -S -Werror -emit-llvm -disable-O0-optnone -o - -x c++ %s | opt -S -p mem2reg,instcombine,tailcallelim | FileCheck %s -check-prefix=CPP-CHECK | ||
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -target-feature +bf16 -S -disable-O0-optnone -Werror -Wall -o /dev/null %s | ||
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#include <arm_sve.h> | ||
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#ifdef SVE_OVERLOADED_FORMS | ||
// A simple used,unused... macro, long enough to represent any SVE builtin. | ||
#define SVE_ACLE_FUNC(A1, A2_UNUSED) A1 | ||
#else | ||
#define SVE_ACLE_FUNC(A1, A2) A1##A2 | ||
#endif | ||
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// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svdup_laneq_s8 | ||
// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0:[0-9]+]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 0) | ||
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z19test_svdup_laneq_s8u10__SVInt8_t | ||
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0:[0-9]+]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 0) | ||
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] | ||
// | ||
svint8_t test_svdup_laneq_s8(svint8_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _s8)(zn, 0); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svdup_laneq_u8 | ||
// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 15) | ||
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z19test_svdup_laneq_u8u11__SVUint8_t | ||
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 15) | ||
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]] | ||
// | ||
svuint8_t test_svdup_laneq_u8(svuint8_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _u8)(zn, 15); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 8 x i16> @test_svdup_laneq_s16 | ||
// CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.laneq.nxv8i16(<vscale x 8 x i16> [[ZN]], i32 1) | ||
// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 8 x i16> @_Z20test_svdup_laneq_s16u11__SVInt16_t | ||
// CPP-CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.laneq.nxv8i16(<vscale x 8 x i16> [[ZN]], i32 1) | ||
// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]] | ||
// | ||
svint16_t test_svdup_laneq_s16(svint16_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _s16)(zn, 1); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 8 x i16> @test_svdup_laneq_u16 | ||
// CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.laneq.nxv8i16(<vscale x 8 x i16> [[ZN]], i32 7) | ||
// CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 8 x i16> @_Z20test_svdup_laneq_u16u12__SVUint16_t | ||
// CPP-CHECK-SAME: (<vscale x 8 x i16> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i16> @llvm.aarch64.sve.dup.laneq.nxv8i16(<vscale x 8 x i16> [[ZN]], i32 7) | ||
// CPP-CHECK-NEXT: ret <vscale x 8 x i16> [[TMP0]] | ||
// | ||
svuint16_t test_svdup_laneq_u16(svuint16_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _u16)(zn, 7); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 4 x i32> @test_svdup_laneq_s32 | ||
// CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.laneq.nxv4i32(<vscale x 4 x i32> [[ZN]], i32 2) | ||
// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 4 x i32> @_Z20test_svdup_laneq_s32u11__SVInt32_t | ||
// CPP-CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.laneq.nxv4i32(<vscale x 4 x i32> [[ZN]], i32 2) | ||
// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]] | ||
// | ||
svint32_t test_svdup_laneq_s32(svint32_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _s32)(zn, 2); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 4 x i32> @test_svdup_laneq_u32 | ||
// CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.laneq.nxv4i32(<vscale x 4 x i32> [[ZN]], i32 3) | ||
// CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 4 x i32> @_Z20test_svdup_laneq_u32u12__SVUint32_t | ||
// CPP-CHECK-SAME: (<vscale x 4 x i32> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i32> @llvm.aarch64.sve.dup.laneq.nxv4i32(<vscale x 4 x i32> [[ZN]], i32 3) | ||
// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[TMP0]] | ||
// | ||
svuint32_t test_svdup_laneq_u32(svuint32_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _u32)(zn, 3); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 2 x i64> @test_svdup_laneq_s64 | ||
// CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.laneq.nxv2i64(<vscale x 2 x i64> [[ZN]], i32 0) | ||
// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 2 x i64> @_Z20test_svdup_laneq_s64u11__SVInt64_t | ||
// CPP-CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.laneq.nxv2i64(<vscale x 2 x i64> [[ZN]], i32 0) | ||
// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]] | ||
// | ||
svint64_t test_svdup_laneq_s64(svint64_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _s64)(zn, 0); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 2 x i64> @test_svdup_laneq_u64 | ||
// CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.laneq.nxv2i64(<vscale x 2 x i64> [[ZN]], i32 1) | ||
// CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 2 x i64> @_Z20test_svdup_laneq_u64u12__SVUint64_t | ||
// CPP-CHECK-SAME: (<vscale x 2 x i64> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i64> @llvm.aarch64.sve.dup.laneq.nxv2i64(<vscale x 2 x i64> [[ZN]], i32 1) | ||
// CPP-CHECK-NEXT: ret <vscale x 2 x i64> [[TMP0]] | ||
// | ||
svuint64_t test_svdup_laneq_u64(svuint64_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _u64)(zn, 1); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 8 x half> @test_svdup_laneq_f16 | ||
// CHECK-SAME: (<vscale x 8 x half> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.laneq.nxv8f16(<vscale x 8 x half> [[ZN]], i32 4) | ||
// CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 8 x half> @_Z20test_svdup_laneq_f16u13__SVFloat16_t | ||
// CPP-CHECK-SAME: (<vscale x 8 x half> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x half> @llvm.aarch64.sve.dup.laneq.nxv8f16(<vscale x 8 x half> [[ZN]], i32 4) | ||
// CPP-CHECK-NEXT: ret <vscale x 8 x half> [[TMP0]] | ||
// | ||
svfloat16_t test_svdup_laneq_f16(svfloat16_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _f16)(zn, 4); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 4 x float> @test_svdup_laneq_f32 | ||
// CHECK-SAME: (<vscale x 4 x float> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.laneq.nxv4f32(<vscale x 4 x float> [[ZN]], i32 1) | ||
// CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 4 x float> @_Z20test_svdup_laneq_f32u13__SVFloat32_t | ||
// CPP-CHECK-SAME: (<vscale x 4 x float> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x float> @llvm.aarch64.sve.dup.laneq.nxv4f32(<vscale x 4 x float> [[ZN]], i32 1) | ||
// CPP-CHECK-NEXT: ret <vscale x 4 x float> [[TMP0]] | ||
// | ||
svfloat32_t test_svdup_laneq_f32(svfloat32_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _f32)(zn, 1); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 2 x double> @test_svdup_laneq_f64 | ||
// CHECK-SAME: (<vscale x 2 x double> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.laneq.nxv2f64(<vscale x 2 x double> [[ZN]], i32 1) | ||
// CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 2 x double> @_Z20test_svdup_laneq_f64u13__SVFloat64_t | ||
// CPP-CHECK-SAME: (<vscale x 2 x double> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x double> @llvm.aarch64.sve.dup.laneq.nxv2f64(<vscale x 2 x double> [[ZN]], i32 1) | ||
// CPP-CHECK-NEXT: ret <vscale x 2 x double> [[TMP0]] | ||
// | ||
svfloat64_t test_svdup_laneq_f64(svfloat64_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _f64)(zn, 1); | ||
} | ||
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// CHECK-LABEL: define dso_local <vscale x 8 x bfloat> @test_svdup_laneq_bf16 | ||
// CHECK-SAME: (<vscale x 8 x bfloat> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CHECK-NEXT: entry: | ||
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.laneq.nxv8bf16(<vscale x 8 x bfloat> [[ZN]], i32 3) | ||
// CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]] | ||
// | ||
// CPP-CHECK-LABEL: define dso_local <vscale x 8 x bfloat> @_Z21test_svdup_laneq_bf16u14__SVBfloat16_t | ||
// CPP-CHECK-SAME: (<vscale x 8 x bfloat> [[ZN:%.*]]) #[[ATTR0]] { | ||
// CPP-CHECK-NEXT: entry: | ||
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.laneq.nxv8bf16(<vscale x 8 x bfloat> [[ZN]], i32 3) | ||
// CPP-CHECK-NEXT: ret <vscale x 8 x bfloat> [[TMP0]] | ||
// | ||
svbfloat16_t test_svdup_laneq_bf16(svbfloat16_t zn) { | ||
return SVE_ACLE_FUNC(svdup_laneq, _bf16)(zn, 3); | ||
} |
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