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[AArch64][GlobalISel] Re-generate some tests for D110802.
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@aemerson
aemerson committed Sep 30, 2021
1 parent fad14a1 commit 2e7deee
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52 changes: 29 additions & 23 deletions llvm/test/CodeGen/AArch64/GlobalISel/combine-mul.mir
View file
Expand Up @@ -13,8 +13,9 @@ body: |
liveins: $x0
; CHECK-LABEL: name: mul_by_zero
; CHECK: liveins: $x0
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: $x0 = COPY [[C]](s64)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: $x0 = COPY [[C]](s64)
%0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 0
%2:_(s64) = G_MUL %0, %1(s64)
Expand All @@ -33,11 +34,12 @@ body: |
; Currently not implemented.
; CHECK-LABEL: name: mul_vector_by_zero
; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
; CHECK: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]]
; CHECK: $q0 = COPY [[MUL]](<4 x s32>)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]]
; CHECK-NEXT: $q0 = COPY [[MUL]](<4 x s32>)
%0:_(<4 x s32>) = COPY $q0
%1:_(s32) = G_CONSTANT i32 0
%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
Expand All @@ -56,8 +58,9 @@ body: |
liveins: $x0
; CHECK-LABEL: name: mul_by_one
; CHECK: liveins: $x0
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK: $x0 = COPY [[COPY]](s64)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
%0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 1
%2:_(s64) = G_MUL %0, %1(s64)
Expand All @@ -76,11 +79,12 @@ body: |
; Currently not implemented.
; CHECK-LABEL: name: mul_vector_by_one
; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
; CHECK: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]]
; CHECK: $q0 = COPY [[MUL]](<4 x s32>)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]]
; CHECK-NEXT: $q0 = COPY [[MUL]](<4 x s32>)
%0:_(<4 x s32>) = COPY $q0
%1:_(s32) = G_CONSTANT i32 1
%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
Expand All @@ -99,10 +103,11 @@ body: |
liveins: $x0
; CHECK-LABEL: name: mul_by_neg_one
; CHECK: liveins: $x0
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY]]
; CHECK: $x0 = COPY [[SUB]](s64)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[COPY]]
; CHECK-NEXT: $x0 = COPY [[SUB]](s64)
%0:_(s64) = COPY $x0
%1:_(s64) = G_CONSTANT i64 -1
%2:_(s64) = G_MUL %0, %1(s64)
Expand All @@ -121,11 +126,12 @@ body: |
; Currently not implemented.
; CHECK-LABEL: name: mul_vector_by_neg_one
; CHECK: liveins: $q0
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
; CHECK: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]]
; CHECK: $q0 = COPY [[MUL]](<4 x s32>)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $q0
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32), [[C]](s32), [[C]](s32)
; CHECK-NEXT: [[MUL:%[0-9]+]]:_(<4 x s32>) = G_MUL [[COPY]], [[BUILD_VECTOR]]
; CHECK-NEXT: $q0 = COPY [[MUL]](<4 x s32>)
%0:_(<4 x s32>) = COPY $q0
%1:_(s32) = G_CONSTANT i32 -1
%2:_(<4 x s32>) = G_BUILD_VECTOR %1(s32), %1(s32), %1(s32), %1(s32)
Expand Down
129 changes: 73 additions & 56 deletions llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir
View file
Expand Up @@ -30,9 +30,10 @@ body: |
;
; CHECK-LABEL: name: right_ident_add
; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0
; CHECK: $w0 = COPY %x(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_ADD %x(s32), %cst
Expand All @@ -50,9 +51,10 @@ body: |
;
; CHECK-LABEL: name: mul_0
; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: $w0 = COPY %cst(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_MUL %x(s32), %cst
Expand All @@ -72,11 +74,12 @@ body: |
;
; CHECK-LABEL: name: mul_0_cant_replace
; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: %op:gpr(s32) = G_MUL %x, %cst
; CHECK: $w0 = COPY %op(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %op:gpr(s32) = G_MUL %x, %cst
; CHECK-NEXT: $w0 = COPY %op(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:gpr(s32) = G_MUL %x(s32), %cst
Expand All @@ -95,9 +98,10 @@ body: |
;
; CHECK-LABEL: name: sdiv_0
; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: $w0 = COPY %cst(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_SDIV %cst, %x
Expand All @@ -115,9 +119,10 @@ body: |
;
; CHECK-LABEL: name: udiv_0
; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: $w0 = COPY %cst(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_UDIV %cst, %x
Expand All @@ -135,9 +140,10 @@ body: |
;
; CHECK-LABEL: name: srem_0
; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: $w0 = COPY %cst(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_SREM %cst, %x
Expand All @@ -155,9 +161,10 @@ body: |
;
; CHECK-LABEL: name: urem_0
; CHECK: liveins: $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 0
; CHECK: $w0 = COPY %cst(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: $w0 = COPY %cst(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_UREM %cst, %x
Expand All @@ -176,9 +183,10 @@ body: |
;
; CHECK-LABEL: name: right_ident_or
; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0
; CHECK: $w0 = COPY %x(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_OR %x(s32), %cst
Expand All @@ -196,9 +204,10 @@ body: |
;
; CHECK-LABEL: name: right_ident_xor
; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0
; CHECK: $w0 = COPY %x(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_XOR %x(s32), %cst
Expand All @@ -216,9 +225,10 @@ body: |
;
; CHECK-LABEL: name: right_ident_shl
; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0
; CHECK: $w0 = COPY %x(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_SHL %x(s32), %cst
Expand All @@ -236,9 +246,10 @@ body: |
;
; CHECK-LABEL: name: right_ident_ashr
; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0
; CHECK: $w0 = COPY %x(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_ASHR %x(s32), %cst
Expand All @@ -256,9 +267,10 @@ body: |
;
; CHECK-LABEL: name: right_ident_lshr
; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0
; CHECK: $w0 = COPY %x(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: $w0 = COPY %x(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 0
%op:_(s32) = G_LSHR %x(s32), %cst
Expand All @@ -276,11 +288,12 @@ body: |
;
; CHECK-LABEL: name: dont_fold_sub
; CHECK: liveins: $w0
; CHECK: %x:_(s32) = COPY $w0
; CHECK: %cst:_(s32) = G_CONSTANT i32 1
; CHECK: %op:_(s32) = G_SUB %x, %cst
; CHECK: $w0 = COPY %op(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %cst:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %op:_(s32) = G_SUB %x, %cst
; CHECK-NEXT: $w0 = COPY %op(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%cst:_(s32) = G_CONSTANT i32 1
%op:_(s32) = G_SUB %x(s32), %cst
Expand All @@ -296,10 +309,11 @@ body: |
liveins: $x0
; CHECK-LABEL: name: look_through_zext
; CHECK: liveins: $x0
; CHECK: %zero:_(s8) = G_CONSTANT i8 0
; CHECK: %zext_zero:_(s64) = G_ZEXT %zero(s8)
; CHECK: $x0 = COPY %zext_zero(s64)
; CHECK: RET_ReallyLR implicit $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %zero:_(s8) = G_CONSTANT i8 0
; CHECK-NEXT: %zext_zero:_(s64) = G_ZEXT %zero(s8)
; CHECK-NEXT: $x0 = COPY %zext_zero(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%zero:_(s8) = G_CONSTANT i8 0
%zext_zero:_(s64) = G_ZEXT %zero(s8)
%c:_(s64) = G_CONSTANT i64 72340172838076673
Expand All @@ -317,9 +331,10 @@ body: |
;
; CHECK-LABEL: name: right_ident_ptr_add
; CHECK: liveins: $x0
; CHECK: %x:_(p0) = COPY $x0
; CHECK: $x0 = COPY %x(p0)
; CHECK: RET_ReallyLR implicit $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(p0) = COPY $x0
; CHECK-NEXT: $x0 = COPY %x(p0)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(p0) = COPY $x0
%cst:_(s64) = G_CONSTANT i64 0
%op:_(p0) = G_PTR_ADD %x(p0), %cst
Expand All @@ -334,9 +349,10 @@ body: |
liveins: $w0, $w1
; CHECK-LABEL: name: right_identity_rotl
; CHECK: liveins: $w0, $w1
; CHECK: %copy:_(s32) = COPY $w0
; CHECK: $w0 = COPY %copy(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %copy:_(s32) = COPY $w0
; CHECK-NEXT: $w0 = COPY %copy(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:_(s32) = COPY $w0
%zero:_(s32) = G_CONSTANT i32 0
%rot:_(s32) = G_ROTL %copy(s32), %zero(s32)
Expand All @@ -352,9 +368,10 @@ body: |
liveins: $w0, $w1
; CHECK-LABEL: name: right_identity_rotr
; CHECK: liveins: $w0, $w1
; CHECK: %copy:_(s32) = COPY $w0
; CHECK: $w0 = COPY %copy(s32)
; CHECK: RET_ReallyLR implicit $w0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %copy:_(s32) = COPY $w0
; CHECK-NEXT: $w0 = COPY %copy(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%copy:_(s32) = COPY $w0
%zero:_(s32) = G_CONSTANT i32 0
%rot:_(s32) = G_ROTR %copy(s32), %zero(s32)
Expand Down

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