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[X86] Migrate tests to use opaque pointers (NFC)
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Test updates were performed using:
https://gist.github.com/nikic/98357b71fd67756b0f064c9517b62a34

These are only the test updates where the test passed without
further modification (which is almost all of them, as the backend
is largely pointer-type agnostic).
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@nikic
nikic committed Jun 22, 2022
1 parent aeccc16 commit 2f448bf
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16 changes: 8 additions & 8 deletions llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll
View file
@@ -1,22 +1,22 @@
; RUN: llc < %s -mtriple=i686-- | FileCheck %s

declare i8* @llvm.returnaddress(i32)
declare ptr @llvm.returnaddress(i32)

declare i8* @llvm.frameaddress(i32)
declare ptr @llvm.frameaddress(i32)

define i8* @test1() {
define ptr @test1() {
; CHECK-LABEL: test1:
entry:
%X = call i8* @llvm.returnaddress( i32 0 )
ret i8* %X
%X = call ptr @llvm.returnaddress( i32 0 )
ret ptr %X
; CHECK: movl {{.*}}(%esp), %eax
}

define i8* @test2() {
define ptr @test2() {
; CHECK-LABEL: test2:
entry:
%X = call i8* @llvm.frameaddress( i32 0 )
ret i8* %X
%X = call ptr @llvm.frameaddress( i32 0 )
ret ptr %X
; CHECK: pushl %ebp
; CHECK: popl %ebp
}
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll
View file
Expand Up @@ -7,12 +7,12 @@

@GLOBAL = external dso_local global i32

define i32 @test(i32* %P1, i32* %P2, i32* %P3) nounwind {
define i32 @test(ptr %P1, ptr %P2, ptr %P3) nounwind {
; CHECK-LABEL: test:
entry:
%L = load i32, i32* @GLOBAL
store i32 12, i32* %P2
%Y = load i32, i32* %P3
%L = load i32, ptr @GLOBAL
store i32 12, ptr %P2
%Y = load i32, ptr %P3
%Z = sub i32 %Y, %L
ret i32 %Z
; CHECK-NOT: {{sub.*GLOBAL}}
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll
View file
@@ -1,6 +1,6 @@
; RUN: llc < %s -mtriple=i686-- | FileCheck %s

@A = external global i32 ; <i32*> [#uses=1]
@Y = global i32* getelementptr (i32, i32* @A, i32 -1) ; <i32**> [#uses=0]
@A = external global i32 ; <ptr> [#uses=1]
@Y = global ptr getelementptr (i32, ptr @A, i32 -1) ; <ptr> [#uses=0]
; CHECK-NOT: 18446744073709551612

4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll
View file
Expand Up @@ -18,14 +18,14 @@ define i32 @test5(i32 %B, i8 %C) {
; CHECK-NEXT: movl %eax, A
; CHECK-NEXT: retl
entry:
%tmp.1 = load i32, i32* @A
%tmp.1 = load i32, ptr @A
%shift.upgrd.1 = zext i8 %C to i32
%tmp.2 = shl i32 %tmp.1, %shift.upgrd.1
%tmp.3 = sub i8 32, %C
%shift.upgrd.2 = zext i8 %tmp.3 to i32
%tmp.4 = lshr i32 %B, %shift.upgrd.2
%tmp.5 = or i32 %tmp.4, %tmp.2
store i32 %tmp.5, i32* @A
store i32 %tmp.5, ptr @A
ret i32 %tmp.5
}

4 changes: 2 additions & 2 deletions llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll
View file
Expand Up @@ -6,7 +6,7 @@ target triple = "i686-apple-darwin8.6.1"
%struct.GLTColor4 = type { float, float, float, float }
%struct.GLTCoord3 = type { float, float, float }
%struct.__GLIContextRec = type { { %struct.anon, { [24 x [16 x float]], [24 x [16 x float]] }, %struct.GLTColor4, { float, float, float, float, %struct.GLTCoord3, float } }, { float, float, float, float, float, float, float, float, [4 x i32], [4 x i32], [4 x i32] } }
%struct.__GLvertex = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, %struct.GLTColor4, float, float, float, i8, i8, i8, i8, [4 x float], [2 x i8*], i32, i32, [16 x %struct.GLTColor4] }
%struct.__GLvertex = type { %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTColor4, %struct.GLTCoord3, float, %struct.GLTColor4, float, float, float, i8, i8, i8, i8, [4 x float], [2 x ptr], i32, i32, [16 x %struct.GLTColor4] }
%struct.anon = type { float, float, float, float, float, float, float, float }

declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8)
Expand Down Expand Up @@ -45,6 +45,6 @@ cond_false183: ; preds = %cond_false, %entry
%tmp446 = zext i8 %tmp436 to i32 ; <i32> [#uses=1]
%tmp447 = shl i32 %tmp446, 24 ; <i32> [#uses=1]
%tmp449 = or i32 0, %tmp447 ; <i32> [#uses=1]
store i32 %tmp449, i32* null
store i32 %tmp449, ptr null
ret void
}
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
View file
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-apple-darwin8 -relocation-model=static | FileCheck %s

@block = external global i8* ; <i8**> [#uses=1]
@last = external global i32 ; <i32*> [#uses=3]
@block = external global ptr ; <ptr> [#uses=1]
@last = external global i32 ; <ptr> [#uses=3]

define i1 @loadAndRLEsource_no_exit_2E_1_label_2E_0(i32 %tmp.21.reload, i32 %tmp.8) {
; CHECK-LABEL: loadAndRLEsource_no_exit_2E_1_label_2E_0:
Expand Down Expand Up @@ -37,14 +37,14 @@ label.0.no_exit.1_crit_edge.exitStub: ; preds = %label.0
codeRepl5.exitStub: ; preds = %label.0
ret i1 false
label.0: ; preds = %newFuncRoot
%tmp.35 = load i32, i32* @last ; <i32> [#uses=1]
%tmp.35 = load i32, ptr @last ; <i32> [#uses=1]
%inc.1 = add i32 %tmp.35, 1 ; <i32> [#uses=2]
store i32 %inc.1, i32* @last
%tmp.36 = load i8*, i8** @block ; <i8*> [#uses=1]
%tmp.38 = getelementptr i8, i8* %tmp.36, i32 %inc.1 ; <i8*> [#uses=1]
store i32 %inc.1, ptr @last
%tmp.36 = load ptr, ptr @block ; <ptr> [#uses=1]
%tmp.38 = getelementptr i8, ptr %tmp.36, i32 %inc.1 ; <ptr> [#uses=1]
%tmp.40 = trunc i32 %tmp.21.reload to i8 ; <i8> [#uses=1]
store i8 %tmp.40, i8* %tmp.38
%tmp.910 = load i32, i32* @last ; <i32> [#uses=1]
store i8 %tmp.40, ptr %tmp.38
%tmp.910 = load i32, ptr @last ; <i32> [#uses=1]
%tmp.1111 = icmp slt i32 %tmp.910, %tmp.8 ; <i1> [#uses=1]
%tmp.1412 = icmp ne i32 %tmp.21.reload, 257 ; <i1> [#uses=1]
%tmp.1613 = and i1 %tmp.1111, %tmp.1412 ; <i1> [#uses=1]
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
View file
Expand Up @@ -4,11 +4,11 @@
; END.


define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>* %d) {
%tmp44 = load <4 x float>, <4 x float>* %a ; <<4 x float>> [#uses=9]
%tmp46 = load <4 x float>, <4 x float>* %b ; <<4 x float>> [#uses=1]
%tmp48 = load <4 x float>, <4 x float>* %c ; <<4 x float>> [#uses=1]
%tmp50 = load <4 x float>, <4 x float>* %d ; <<4 x float>> [#uses=1]
define i32 @foo(ptr %a, ptr %b, ptr %c, ptr %d) {
%tmp44 = load <4 x float>, ptr %a ; <<4 x float>> [#uses=9]
%tmp46 = load <4 x float>, ptr %b ; <<4 x float>> [#uses=1]
%tmp48 = load <4 x float>, ptr %c ; <<4 x float>> [#uses=1]
%tmp50 = load <4 x float>, ptr %d ; <<4 x float>> [#uses=1]
%tmp51 = bitcast <4 x float> %tmp44 to <4 x i32> ; <<4 x i32>> [#uses=1]
%tmp = shufflevector <4 x i32> %tmp51, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
%tmp52 = bitcast <4 x i32> %tmp to <4 x float> ; <<4 x float>> [#uses=1]
Expand All @@ -23,7 +23,7 @@ define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>*
%tmp.upgrd.1 = shufflevector <8 x i16> %tmp102, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
%tmp105 = shufflevector <8 x i16> %tmp.upgrd.1, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
%tmp105.upgrd.2 = bitcast <8 x i16> %tmp105 to <4 x float> ; <<4 x float>> [#uses=1]
store <4 x float> %tmp105.upgrd.2, <4 x float>* %a
store <4 x float> %tmp105.upgrd.2, ptr %a
%tmp108 = bitcast <4 x float> %tmp46 to <4 x i32> ; <<4 x i32>> [#uses=1]
%tmp109 = shufflevector <4 x i32> %tmp108, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
%tmp109.upgrd.3 = bitcast <4 x i32> %tmp109 to <4 x float> ; <<4 x float>> [#uses=1]
Expand All @@ -38,7 +38,7 @@ define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>*
%tmp164 = shufflevector <8 x i16> %tmp163, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
%tmp166 = shufflevector <8 x i16> %tmp164, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
%tmp166.upgrd.4 = bitcast <8 x i16> %tmp166 to <4 x float> ; <<4 x float>> [#uses=1]
store <4 x float> %tmp166.upgrd.4, <4 x float>* %b
store <4 x float> %tmp166.upgrd.4, ptr %b
%tmp169 = bitcast <4 x float> %tmp48 to <4 x i32> ; <<4 x i32>> [#uses=1]
%tmp170 = shufflevector <4 x i32> %tmp169, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
%tmp170.upgrd.5 = bitcast <4 x i32> %tmp170 to <4 x float> ; <<4 x float>> [#uses=1]
Expand All @@ -53,7 +53,7 @@ define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>*
%tmp225 = shufflevector <8 x i16> %tmp224, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
%tmp227 = shufflevector <8 x i16> %tmp225, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
%tmp227.upgrd.6 = bitcast <8 x i16> %tmp227 to <4 x float> ; <<4 x float>> [#uses=1]
store <4 x float> %tmp227.upgrd.6, <4 x float>* %c
store <4 x float> %tmp227.upgrd.6, ptr %c
%tmp230 = bitcast <4 x float> %tmp50 to <4 x i32> ; <<4 x i32>> [#uses=1]
%tmp231 = shufflevector <4 x i32> %tmp230, <4 x i32> undef, <4 x i32> < i32 3, i32 3, i32 3, i32 3 > ; <<4 x i32>> [#uses=2]
%tmp231.upgrd.7 = bitcast <4 x i32> %tmp231 to <4 x float> ; <<4 x float>> [#uses=1]
Expand All @@ -68,7 +68,7 @@ define i32 @foo(<4 x float>* %a, <4 x float>* %b, <4 x float>* %c, <4 x float>*
%tmp286 = shufflevector <8 x i16> %tmp285, <8 x i16> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 6, i32 5, i32 4, i32 7 > ; <<8 x i16>> [#uses=1]
%tmp288 = shufflevector <8 x i16> %tmp286, <8 x i16> undef, <8 x i32> < i32 2, i32 1, i32 0, i32 3, i32 4, i32 5, i32 6, i32 7 > ; <<8 x i16>> [#uses=1]
%tmp288.upgrd.8 = bitcast <8 x i16> %tmp288 to <4 x float> ; <<4 x float>> [#uses=1]
store <4 x float> %tmp288.upgrd.8, <4 x float>* %d
store <4 x float> %tmp288.upgrd.8, ptr %d
ret i32 0
}

Expand Down
24 changes: 11 additions & 13 deletions llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll
View file
Expand Up @@ -5,22 +5,20 @@
; It's possible to schedule this in 14 instructions by avoiding
; callee-save registers, but the scheduler isn't currently that
; conervative with registers.
@size20 = external dso_local global i32 ; <i32*> [#uses=1]
@in5 = external dso_local global i8* ; <i8**> [#uses=1]
@size20 = external dso_local global i32 ; <ptr> [#uses=1]
@in5 = external dso_local global ptr ; <ptr> [#uses=1]

define i32 @compare(i8* %a, i8* %b) nounwind {
%tmp = bitcast i8* %a to i32* ; <i32*> [#uses=1]
%tmp1 = bitcast i8* %b to i32* ; <i32*> [#uses=1]
%tmp.upgrd.1 = load i32, i32* @size20 ; <i32> [#uses=1]
%tmp.upgrd.2 = load i8*, i8** @in5 ; <i8*> [#uses=2]
%tmp3 = load i32, i32* %tmp1 ; <i32> [#uses=1]
define i32 @compare(ptr %a, ptr %b) nounwind {
%tmp.upgrd.1 = load i32, ptr @size20 ; <i32> [#uses=1]
%tmp.upgrd.2 = load ptr, ptr @in5 ; <ptr> [#uses=2]
%tmp3 = load i32, ptr %b ; <i32> [#uses=1]
%gep.upgrd.3 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
%tmp4 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.3 ; <i8*> [#uses=2]
%tmp7 = load i32, i32* %tmp ; <i32> [#uses=1]
%tmp4 = getelementptr i8, ptr %tmp.upgrd.2, i64 %gep.upgrd.3 ; <ptr> [#uses=2]
%tmp7 = load i32, ptr %a ; <i32> [#uses=1]
%gep.upgrd.4 = zext i32 %tmp7 to i64 ; <i64> [#uses=1]
%tmp8 = getelementptr i8, i8* %tmp.upgrd.2, i64 %gep.upgrd.4 ; <i8*> [#uses=2]
%tmp.upgrd.5 = tail call i32 @memcmp( i8* %tmp8, i8* %tmp4, i32 %tmp.upgrd.1 ) ; <i32> [#uses=1]
%tmp8 = getelementptr i8, ptr %tmp.upgrd.2, i64 %gep.upgrd.4 ; <ptr> [#uses=2]
%tmp.upgrd.5 = tail call i32 @memcmp( ptr %tmp8, ptr %tmp4, i32 %tmp.upgrd.1 ) ; <i32> [#uses=1]
ret i32 %tmp.upgrd.5
}

declare i32 @memcmp(i8*, i8*, i32)
declare i32 @memcmp(ptr, ptr, i32)
14 changes: 7 additions & 7 deletions llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll
View file
Expand Up @@ -2,23 +2,23 @@
; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | \
; RUN: grep asm-printer | grep 13

define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind {
define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(ptr %tmp435.i, ptr %tmp449.i.out) nounwind {
newFuncRoot:
br label %cond_true456.i
bb459.i.exitStub: ; preds = %cond_true456.i
store i32 %tmp449.i, i32* %tmp449.i.out
store i32 %tmp449.i, ptr %tmp449.i.out
ret void
cond_true456.i: ; preds = %cond_true456.i, %newFuncRoot
%__s441.2.4.i = phi i8* [ %tmp451.i.upgrd.1, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; <i8*> [#uses=2]
%__s441.2.4.i = phi ptr [ %tmp451.i.upgrd.1, %cond_true456.i ], [ %tmp435.i, %newFuncRoot ] ; <ptr> [#uses=2]
%__h.2.4.i = phi i32 [ %tmp449.i, %cond_true456.i ], [ 0, %newFuncRoot ] ; <i32> [#uses=1]
%tmp446.i = mul i32 %__h.2.4.i, 5 ; <i32> [#uses=1]
%tmp.i = load i8, i8* %__s441.2.4.i ; <i8> [#uses=1]
%tmp.i = load i8, ptr %__s441.2.4.i ; <i8> [#uses=1]
%tmp448.i = sext i8 %tmp.i to i32 ; <i32> [#uses=1]
%tmp449.i = add i32 %tmp448.i, %tmp446.i ; <i32> [#uses=2]
%tmp450.i = ptrtoint i8* %__s441.2.4.i to i32 ; <i32> [#uses=1]
%tmp450.i = ptrtoint ptr %__s441.2.4.i to i32 ; <i32> [#uses=1]
%tmp451.i = add i32 %tmp450.i, 1 ; <i32> [#uses=1]
%tmp451.i.upgrd.1 = inttoptr i32 %tmp451.i to i8* ; <i8*> [#uses=2]
%tmp45435.i = load i8, i8* %tmp451.i.upgrd.1 ; <i8> [#uses=1]
%tmp451.i.upgrd.1 = inttoptr i32 %tmp451.i to ptr ; <ptr> [#uses=2]
%tmp45435.i = load i8, ptr %tmp451.i.upgrd.1 ; <i8> [#uses=1]
%tmp45536.i = icmp eq i8 %tmp45435.i, 0 ; <i1> [#uses=1]
br i1 %tmp45536.i, label %bb459.i.exitStub, label %cond_true456.i
}
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll
View file
Expand Up @@ -4,8 +4,8 @@

; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s

@B = external dso_local global i32 ; <i32*> [#uses=2]
@C = external dso_local global i16* ; <i16**> [#uses=2]
@B = external dso_local global i32 ; <ptr> [#uses=2]
@C = external dso_local global ptr ; <ptr> [#uses=2]

define void @test(i32 %A) {
; CHECK-LABEL: test:
Expand All @@ -18,17 +18,17 @@ define void @test(i32 %A) {
; CHECK-NEXT: addl %eax, C
; CHECK-NEXT: retl
%A.upgrd.1 = trunc i32 %A to i8 ; <i8> [#uses=1]
%tmp2 = load i32, i32* @B ; <i32> [#uses=1]
%tmp2 = load i32, ptr @B ; <i32> [#uses=1]
%tmp3 = and i8 %A.upgrd.1, 16 ; <i8> [#uses=1]
%shift.upgrd.2 = zext i8 %tmp3 to i32 ; <i32> [#uses=1]
%tmp4 = shl i32 %tmp2, %shift.upgrd.2 ; <i32> [#uses=1]
store i32 %tmp4, i32* @B
store i32 %tmp4, ptr @B
%tmp6 = lshr i32 %A, 3 ; <i32> [#uses=1]
%tmp = load i16*, i16** @C ; <i16*> [#uses=1]
%tmp8 = ptrtoint i16* %tmp to i32 ; <i32> [#uses=1]
%tmp = load ptr, ptr @C ; <ptr> [#uses=1]
%tmp8 = ptrtoint ptr %tmp to i32 ; <i32> [#uses=1]
%tmp9 = add i32 %tmp8, %tmp6 ; <i32> [#uses=1]
%tmp9.upgrd.3 = inttoptr i32 %tmp9 to i16* ; <i16*> [#uses=1]
store i16* %tmp9.upgrd.3, i16** @C
%tmp9.upgrd.3 = inttoptr i32 %tmp9 to ptr ; <ptr> [#uses=1]
store ptr %tmp9.upgrd.3, ptr @C
ret void
}

18 changes: 9 additions & 9 deletions llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll
View file
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s

@A = external dso_local global i16* ; <i16**> [#uses=1]
@B = external dso_local global i32 ; <i32*> [#uses=1]
@C = external dso_local global i32 ; <i32*> [#uses=2]
@A = external dso_local global ptr ; <ptr> [#uses=1]
@B = external dso_local global i32 ; <ptr> [#uses=1]
@C = external dso_local global i32 ; <ptr> [#uses=2]

define void @test() {
; CHECK-LABEL: test:
Expand All @@ -19,21 +19,21 @@ define void @test() {
; CHECK-NEXT: orl %edx, %eax
; CHECK-NEXT: movl %eax, C
; CHECK-NEXT: retl
%tmp = load i16*, i16** @A ; <i16*> [#uses=1]
%tmp1 = getelementptr i16, i16* %tmp, i32 1 ; <i16*> [#uses=1]
%tmp.upgrd.1 = load i16, i16* %tmp1 ; <i16> [#uses=1]
%tmp = load ptr, ptr @A ; <ptr> [#uses=1]
%tmp1 = getelementptr i16, ptr %tmp, i32 1 ; <ptr> [#uses=1]
%tmp.upgrd.1 = load i16, ptr %tmp1 ; <i16> [#uses=1]
%tmp3 = zext i16 %tmp.upgrd.1 to i32 ; <i32> [#uses=1]
%tmp.upgrd.2 = load i32, i32* @B ; <i32> [#uses=1]
%tmp.upgrd.2 = load i32, ptr @B ; <i32> [#uses=1]
%tmp4 = and i32 %tmp.upgrd.2, 16 ; <i32> [#uses=1]
%tmp5 = load i32, i32* @C ; <i32> [#uses=1]
%tmp5 = load i32, ptr @C ; <i32> [#uses=1]
%tmp6 = trunc i32 %tmp4 to i8 ; <i8> [#uses=2]
%shift.upgrd.3 = zext i8 %tmp6 to i32 ; <i32> [#uses=1]
%tmp7 = shl i32 %tmp5, %shift.upgrd.3 ; <i32> [#uses=1]
%tmp9 = xor i8 %tmp6, 16 ; <i8> [#uses=1]
%shift.upgrd.4 = zext i8 %tmp9 to i32 ; <i32> [#uses=1]
%tmp11 = lshr i32 %tmp3, %shift.upgrd.4 ; <i32> [#uses=1]
%tmp12 = or i32 %tmp11, %tmp7 ; <i32> [#uses=1]
store i32 %tmp12, i32* @C
store i32 %tmp12, ptr @C
ret void
}

27 changes: 11 additions & 16 deletions llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll
View file
Expand Up @@ -3,7 +3,7 @@
; RUN: grep "asm-printer" | grep 33

target datalayout = "e-p:32:32"
define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) nounwind {
define void @foo(ptr %mc, ptr %bp, ptr %ms, ptr %xmb, ptr %mpp, ptr %tpmm, ptr %ip, ptr %tpim, ptr %dpp, ptr %tpdm, ptr %bpi, i32 %M) nounwind {
entry:
%tmp9 = icmp slt i32 %M, 5 ; <i1> [#uses=1]
br i1 %tmp9, label %return, label %cond_true
Expand All @@ -13,21 +13,17 @@ cond_true: ; preds = %cond_true, %entry
%tmp. = shl i32 %indvar, 2 ; <i32> [#uses=1]
%tmp.10 = add nsw i32 %tmp., 1 ; <i32> [#uses=2]
%tmp31 = add nsw i32 %tmp.10, -1 ; <i32> [#uses=4]
%tmp32 = getelementptr i32, i32* %mpp, i32 %tmp31 ; <i32*> [#uses=1]
%tmp34 = bitcast i32* %tmp32 to <16 x i8>* ; <i8*> [#uses=1]
%tmp = load <16 x i8>, <16 x i8>* %tmp34, align 1
%tmp42 = getelementptr i32, i32* %tpmm, i32 %tmp31 ; <i32*> [#uses=1]
%tmp42.upgrd.1 = bitcast i32* %tmp42 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
%tmp46 = load <4 x i32>, <4 x i32>* %tmp42.upgrd.1 ; <<4 x i32>> [#uses=1]
%tmp32 = getelementptr i32, ptr %mpp, i32 %tmp31 ; <ptr> [#uses=1]
%tmp = load <16 x i8>, ptr %tmp32, align 1
%tmp42 = getelementptr i32, ptr %tpmm, i32 %tmp31 ; <ptr> [#uses=1]
%tmp46 = load <4 x i32>, ptr %tmp42 ; <<4 x i32>> [#uses=1]
%tmp54 = bitcast <16 x i8> %tmp to <4 x i32> ; <<4 x i32>> [#uses=1]
%tmp55 = add <4 x i32> %tmp54, %tmp46 ; <<4 x i32>> [#uses=2]
%tmp55.upgrd.2 = bitcast <4 x i32> %tmp55 to <2 x i64> ; <<2 x i64>> [#uses=1]
%tmp62 = getelementptr i32, i32* %ip, i32 %tmp31 ; <i32*> [#uses=1]
%tmp65 = bitcast i32* %tmp62 to <16 x i8>* ; <i8*> [#uses=1]
%tmp66 = load <16 x i8>, <16 x i8>* %tmp65, align 1
%tmp73 = getelementptr i32, i32* %tpim, i32 %tmp31 ; <i32*> [#uses=1]
%tmp73.upgrd.3 = bitcast i32* %tmp73 to <4 x i32>* ; <<4 x i32>*> [#uses=1]
%tmp77 = load <4 x i32>, <4 x i32>* %tmp73.upgrd.3 ; <<4 x i32>> [#uses=1]
%tmp62 = getelementptr i32, ptr %ip, i32 %tmp31 ; <ptr> [#uses=1]
%tmp66 = load <16 x i8>, ptr %tmp62, align 1
%tmp73 = getelementptr i32, ptr %tpim, i32 %tmp31 ; <ptr> [#uses=1]
%tmp77 = load <4 x i32>, ptr %tmp73 ; <<4 x i32>> [#uses=1]
%tmp87 = bitcast <16 x i8> %tmp66 to <4 x i32> ; <<4 x i32>> [#uses=1]
%tmp88 = add <4 x i32> %tmp87, %tmp77 ; <<4 x i32>> [#uses=2]
%tmp88.upgrd.4 = bitcast <4 x i32> %tmp88 to <2 x i64> ; <<2 x i64>> [#uses=1]
Expand All @@ -37,9 +33,8 @@ cond_true: ; preds = %cond_true, %entry
%tmp111 = and <2 x i64> %tmp110, %tmp55.upgrd.2 ; <<2 x i64>> [#uses=1]
%tmp121 = and <2 x i64> %tmp99.upgrd.5, %tmp88.upgrd.4 ; <<2 x i64>> [#uses=1]
%tmp131 = or <2 x i64> %tmp121, %tmp111 ; <<2 x i64>> [#uses=1]
%tmp137 = getelementptr i32, i32* %mc, i32 %tmp.10 ; <i32*> [#uses=1]
%tmp137.upgrd.7 = bitcast i32* %tmp137 to <2 x i64>* ; <<2 x i64>*> [#uses=1]
store <2 x i64> %tmp131, <2 x i64>* %tmp137.upgrd.7
%tmp137 = getelementptr i32, ptr %mc, i32 %tmp.10 ; <ptr> [#uses=1]
store <2 x i64> %tmp131, ptr %tmp137
%tmp147 = add nsw i32 %tmp.10, 8 ; <i32> [#uses=1]
%tmp.upgrd.8 = icmp ne i32 %tmp147, %M ; <i1> [#uses=1]
%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
View file
Expand Up @@ -6,7 +6,7 @@ cond_true12: ; preds = %0
ret i32 0
cond_next33: ; preds = %0
%tmp44.i = call double @foo( double 0.000000e+00, i32 32 ) ; <double> [#uses=1]
%tmp61.i = load i8, i8* null ; <i8> [#uses=1]
%tmp61.i = load i8, ptr null ; <i8> [#uses=1]
%tmp61.i.upgrd.1 = zext i8 %tmp61.i to i32 ; <i32> [#uses=1]
%tmp58.i = or i32 0, %tmp61.i.upgrd.1 ; <i32> [#uses=1]
%tmp62.i = or i32 %tmp58.i, 0 ; <i32> [#uses=1]
Expand Down

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