[mlir] Fix printing when linalg.map has no inputs.

Differential Revision: https://reviews.llvm.org/D136836
llvm · Oct 27, 2022 · 30ceb74 · 30ceb74
1 parent 38f44cc
commit 30ceb74
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Showing 2 changed files with 25 additions and 4 deletions.
diff --git a/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp b/mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
@@ -176,12 +176,14 @@ static void printCommonStructuredOpParts(OpAsmPrinter &p, ValueRange inputs,
 static void printCommonStructuredOpPartsWithNewLine(OpAsmPrinter &p,
                                                     ValueRange inputs,
                                                     ValueRange outputs) {
-  p.printNewline();
-  if (!inputs.empty())
+  if (!inputs.empty()) {
+    p.printNewline();
     p << "ins(" << inputs << " : " << inputs.getTypes() << ")";
-  p.printNewline();
-  if (!outputs.empty())
+  }
+  if (!outputs.empty()) {
+    p.printNewline();
     p << "outs(" << outputs << " : " << outputs.getTypes() << ")";
+  }
 }
 //===----------------------------------------------------------------------===//
 // Specific parsing and printing for named structured ops created by ods-gen.

diff --git a/mlir/test/Dialect/Linalg/roundtrip.mlir b/mlir/test/Dialect/Linalg/roundtrip.mlir
@@ -326,6 +326,25 @@ func.func @mixed_parallel_reduced_results(%arg0 : tensor<?x?x?xf32>,
 
 // -----
 
+func.func @map_no_inputs(%init: tensor<64xf32>) -> tensor<64xf32> {
+   %add = linalg.map
+      outs(%init:tensor<64xf32>)
+      () {
+        %0 = arith.constant 0.0: f32
+        linalg.yield %0: f32
+      }
+  func.return %add : tensor<64xf32>
+}
+// CHECK-LABEL: func @map_no_inputs
+//       CHECK:   linalg.map
+//  CHECK-NEXT:   outs
+//  CHECK-NEXT:   () {
+//  CHECK-NEXT:     arith.constant
+//  CHECK-NEXT:     linalg.yield
+//  CHECK-NEXT:   }
+
+// -----
+
 func.func @map_binary(%lhs: tensor<64xf32>, %rhs: tensor<64xf32>,
                       %init: tensor<64xf32>) -> tensor<64xf32> {
    %add = linalg.map