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[NFCI][CostModel] Unify FNeg cost
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Enable TTIImpl::getUserCost to handle FNeg so that
getInstructionThroughput can call that instead. This means we can
remove the code in the AMDGPU backend too.

Differential Revision: https://reviews.llvm.org/D81635
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sparker-arm committed Jun 15, 2020
1 parent 7cac7e0 commit 321ebfd
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Showing 4 changed files with 9 additions and 39 deletions.
13 changes: 8 additions & 5 deletions llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
Expand Up @@ -861,11 +861,14 @@ class TargetTransformInfoImplCRTPBase : public TargetTransformInfoImplBase {
case Instruction::AShr:
case Instruction::And:
case Instruction::Or:
case Instruction::Xor: {
TargetTransformInfo::OperandValueKind Op1VK, Op2VK;
TargetTransformInfo::OperandValueProperties Op1VP, Op2VP;
Op1VK = TTI::getOperandInfo(U->getOperand(0), Op1VP);
Op2VK = TTI::getOperandInfo(U->getOperand(1), Op2VP);
case Instruction::Xor:
case Instruction::FNeg: {
TTI::OperandValueProperties Op1VP = TTI::OP_None;
TTI::OperandValueProperties Op2VP = TTI::OP_None;
TTI::OperandValueKind Op1VK =
TTI::getOperandInfo(U->getOperand(0), Op1VP);
TTI::OperandValueKind Op2VK = Opcode != Instruction::FNeg ?
TTI::getOperandInfo(U->getOperand(1), Op2VP) : TTI::OK_AnyValue;
SmallVector<const Value *, 2> Operands(U->operand_values());
return TargetTTI->getArithmeticInstrCost(Opcode, Ty, CostKind,
Op1VK, Op2VK,
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12 changes: 1 addition & 11 deletions llvm/lib/Analysis/TargetTransformInfo.cpp
Expand Up @@ -1250,18 +1250,8 @@ int TargetTransformInfo::getInstructionThroughput(const Instruction *I) const {
case Instruction::And:
case Instruction::Or:
case Instruction::Xor:
case Instruction::FNeg:
return getUserCost(I, CostKind);
case Instruction::FNeg: {
TargetTransformInfo::OperandValueKind Op1VK, Op2VK;
TargetTransformInfo::OperandValueProperties Op1VP, Op2VP;
Op1VK = getOperandInfo(I->getOperand(0), Op1VP);
Op2VK = OK_AnyValue;
Op2VP = OP_None;
SmallVector<const Value *, 2> Operands(I->operand_values());
return getArithmeticInstrCost(I->getOpcode(), I->getType(), CostKind,
Op1VK, Op2VK,
Op1VP, Op2VP, Operands, I);
}
case Instruction::Select:
case Instruction::ICmp:
case Instruction::FCmp:
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20 changes: 0 additions & 20 deletions llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
Expand Up @@ -983,26 +983,6 @@ void GCNTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
CommonTTI.getUnrollingPreferences(L, SE, UP);
}

unsigned
GCNTTIImpl::getUserCost(const User *U, ArrayRef<const Value *> Operands,
TTI::TargetCostKind CostKind) {
const Instruction *I = dyn_cast<Instruction>(U);
if (!I)
return BaseT::getUserCost(U, Operands, CostKind);

// Estimate different operations to be optimized out
switch (I->getOpcode()) {
case Instruction::FNeg:
return getArithmeticInstrCost(I->getOpcode(), I->getType(), CostKind,
TTI::OK_AnyValue, TTI::OK_AnyValue,
TTI::OP_None, TTI::OP_None, Operands, I);
default:
break;
}

return BaseT::getUserCost(U, Operands, CostKind);
}

unsigned R600TTIImpl::getHardwareNumberOfRegisters(bool Vec) const {
return 4 * 128; // XXX - 4 channels. Should these count as vector instead?
}
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3 changes: 0 additions & 3 deletions llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
Expand Up @@ -237,9 +237,6 @@ class GCNTTIImpl final : public BasicTTIImplBase<GCNTTIImpl> {
int getMinMaxReductionCost(
VectorType *Ty, VectorType *CondTy, bool IsPairwiseForm, bool IsUnsigned,
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput);

unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands,
TTI::TargetCostKind CostKind);
};

class R600TTIImpl final : public BasicTTIImplBase<R600TTIImpl> {
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