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[DAGCombine] Fix for PR35765
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Remove the acceptance of ANY_EXTEND nodes while trying to move and
nodes back to loads.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=35765

Differential Revision: https://reviews.llvm.org/D41625

llvm-svn: 321641
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sparker-arm committed Jan 2, 2018
1 parent 2dea5e0 commit 3570c55
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Showing 2 changed files with 2 additions and 2 deletions.
1 change: 0 additions & 1 deletion llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Expand Up @@ -3850,7 +3850,6 @@ bool DAGCombiner::SearchForAndLoads(SDNode *N,
return false;
}
case ISD::ZERO_EXTEND:
case ISD::ANY_EXTEND:
case ISD::AssertZext: {
unsigned ActiveBits = Mask->getAPIntValue().countTrailingOnes();
EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);
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3 changes: 2 additions & 1 deletion llvm/test/CodeGen/X86/pr35765.ll
Expand Up @@ -17,8 +17,9 @@ define void @PR35765() {
; CHECK-NEXT: movzwl {{.*}}(%rip), %ecx
; CHECK-NEXT: movzwl {{.*}}(%rip), %edx
; CHECK-NEXT: notl %edx
; CHECK-NEXT: orl $63488, %edx # imm = 0xF800
; CHECK-NEXT: movzwl %dx, %edx
; CHECK-NEXT: orl %ecx, %edx
; CHECK-NEXT: orl $-2048, %edx # imm = 0xF800
; CHECK-NEXT: xorl %eax, %edx
; CHECK-NEXT: movslq %edx, %rax
; CHECK-NEXT: movq %rax, {{.*}}(%rip)
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