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[OpenCL] AMDGCN target will generate images in constant address space
Allows AMDGCN target to generate images (such as %opencl.image2d_t) in constant address space. Images will still be generated in global address space by default. Added tests to existing opencl-types.cl in test\CodeGenOpenCL. Patch by Aaron En Ye Shi. Differential Revision: https://reviews.llvm.org/D22523 llvm-svn: 276161
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// RUN: %clang_cc1 %s -emit-llvm -o - -O0 | FileCheck %s | ||
// RUN: %clang_cc1 %s -triple "spir-unknown-unknown" -emit-llvm -o - -O0 | FileCheck %s --check-prefix=CHECK-SPIR | ||
// RUN: %clang_cc1 %s -triple "amdgcn--amdhsa" -emit-llvm -o - -O0 | FileCheck %s --check-prefix=CHECK-AMDGCN | ||
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constant sampler_t glb_smp = 7; | ||
// CHECK: constant i32 7 | ||
// CHECK-SPIR: constant i32 7 | ||
// CHECK-AMDGCN: addrspace(2) constant i32 7 | ||
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void fnc1(image1d_t img) {} | ||
// CHECK: @fnc1(%opencl.image1d_ro_t* | ||
// CHECK-SPIR: @fnc1(%opencl.image1d_ro_t addrspace(1)* | ||
// CHECK-AMDGCN: @fnc1(%opencl.image1d_ro_t addrspace(2)* | ||
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void fnc1arr(image1d_array_t img) {} | ||
// CHECK: @fnc1arr(%opencl.image1d_array_ro_t* | ||
// CHECK-SPIR: @fnc1arr(%opencl.image1d_array_ro_t addrspace(1)* | ||
// CHECK-AMDGCN: @fnc1arr(%opencl.image1d_array_ro_t addrspace(2)* | ||
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void fnc1buff(image1d_buffer_t img) {} | ||
// CHECK: @fnc1buff(%opencl.image1d_buffer_ro_t* | ||
// CHECK-SPIR: @fnc1buff(%opencl.image1d_buffer_ro_t addrspace(1)* | ||
// CHECK-AMDGCN: @fnc1buff(%opencl.image1d_buffer_ro_t addrspace(2)* | ||
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void fnc2(image2d_t img) {} | ||
// CHECK: @fnc2(%opencl.image2d_ro_t* | ||
// CHECK-SPIR: @fnc2(%opencl.image2d_ro_t addrspace(1)* | ||
// CHECK-AMDGCN: @fnc2(%opencl.image2d_ro_t addrspace(2)* | ||
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void fnc2arr(image2d_array_t img) {} | ||
// CHECK: @fnc2arr(%opencl.image2d_array_ro_t* | ||
// CHECK-SPIR: @fnc2arr(%opencl.image2d_array_ro_t addrspace(1)* | ||
// CHECK-AMDGCN: @fnc2arr(%opencl.image2d_array_ro_t addrspace(2)* | ||
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void fnc3(image3d_t img) {} | ||
// CHECK: @fnc3(%opencl.image3d_ro_t* | ||
// CHECK-SPIR: @fnc3(%opencl.image3d_ro_t addrspace(1)* | ||
// CHECK-AMDGCN: @fnc3(%opencl.image3d_ro_t addrspace(2)* | ||
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void fnc4smp(sampler_t s) {} | ||
// CHECK-LABEL: define {{.*}}void @fnc4smp(i32 | ||
// CHECK-SPIR-LABEL: define {{.*}}void @fnc4smp(i32 | ||
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kernel void foo(image1d_t img) { | ||
sampler_t smp = 5; | ||
// CHECK: alloca i32 | ||
// CHECK-SPIR: alloca i32 | ||
event_t evt; | ||
// CHECK: alloca %opencl.event_t* | ||
// CHECK: store i32 5, | ||
// CHECK-SPIR: alloca %opencl.event_t* | ||
// CHECK-SPIR: store i32 5, | ||
fnc4smp(smp); | ||
// CHECK: call {{.*}}void @fnc4smp(i32 | ||
// CHECK-SPIR: call {{.*}}void @fnc4smp(i32 | ||
fnc4smp(glb_smp); | ||
// CHECK: call {{.*}}void @fnc4smp(i32 | ||
// CHECK-SPIR: call {{.*}}void @fnc4smp(i32 | ||
} | ||
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void __attribute__((overloadable)) bad1(image1d_t b, image2d_t c, image2d_t d) {} | ||
// CHECK-LABEL: @{{_Z4bad114ocl_image1d_ro14ocl_image2d_roS0_|"\\01\?bad1@@\$\$J0YAXPAUocl_image1d_ro@@PAUocl_image2d_ro@@1@Z"}} | ||
// CHECK-SPIR-LABEL: @{{_Z4bad114ocl_image1d_ro14ocl_image2d_roS0_|"\\01\?bad1@@\$\$J0YAXPAUocl_image1d_ro@@PAUocl_image2d_ro@@1@Z"}} | ||
// CHECK-AMDGCN-LABEL: @{{_Z4bad114ocl_image1d_ro14ocl_image2d_roS0_|"\\01\?bad1@@\$\$J0YAXPAUocl_image1d_ro@@PAUocl_image2d_ro@@1@Z"}}(%opencl.image1d_ro_t addrspace(2)*{{.*}}%opencl.image2d_ro_t addrspace(2)*{{.*}}%opencl.image2d_ro_t addrspace(2)*{{.*}}) |