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[BOLT][RISCV] Implement getCalleeSavedRegs (#69161)
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The main reason for implementing this now is to ensure the
`assume=abi.test` test passes on RISC-V. Since it uses
`--indirect-call-promotion=all`, it requires some support for register
analysis on the target.

Further testing and implementation of register/frame analysis on RISC-V
will come later.
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mtvec committed Oct 16, 2023
1 parent 5857fec commit 3ab536f
Showing 1 changed file with 16 additions and 0 deletions.
16 changes: 16 additions & 0 deletions bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -42,6 +42,22 @@ class RISCVMCPlusBuilder : public MCPlusBuilder {
*RISCVExprB.getSubExpr(), Comp);
}

void getCalleeSavedRegs(BitVector &Regs) const override {
Regs |= getAliases(RISCV::X2);
Regs |= getAliases(RISCV::X8);
Regs |= getAliases(RISCV::X9);
Regs |= getAliases(RISCV::X18);
Regs |= getAliases(RISCV::X19);
Regs |= getAliases(RISCV::X20);
Regs |= getAliases(RISCV::X21);
Regs |= getAliases(RISCV::X22);
Regs |= getAliases(RISCV::X23);
Regs |= getAliases(RISCV::X24);
Regs |= getAliases(RISCV::X25);
Regs |= getAliases(RISCV::X26);
Regs |= getAliases(RISCV::X27);
}

bool shouldRecordCodeRelocation(uint64_t RelType) const override {
switch (RelType) {
case ELF::R_RISCV_JAL:
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