Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
[DAGCombiner] Add command line options to guard store width reduction
optimizations As discussed in the thread http://lists.llvm.org/pipermail/llvm-dev/2020-May/141838.html, some bit field access width can be reduced by ReduceLoadOpStoreWidth, some can't. If two accesses are very close, and the first access width is reduced, the second is not. Then the wide load of second access will be stalled for long time. This patch add command line options to guard ReduceLoadOpStoreWidth and ShrinkLoadReplaceStoreWithStore, so users can use them to disable these store width reduction optimizations. Differential Revision: https://reviews.llvm.org/D80745
- Loading branch information
Showing
3 changed files
with
62 additions
and
1 deletion.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,30 @@ | ||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | ||
; RUN: llc < %s -mtriple=x86_64-- -combiner-reduce-load-op-store-width=false | FileCheck %s | ||
|
||
%struct.bit_fields = type { i32 } | ||
|
||
define void @clear_b1(%struct.bit_fields* %ptr) { | ||
; CHECK-LABEL: clear_b1: | ||
; CHECK: # %bb.0: # %entry | ||
; CHECK-NEXT: andl $-2, (%rdi) | ||
; CHECK-NEXT: retq | ||
entry: | ||
%0 = bitcast %struct.bit_fields* %ptr to i32* | ||
%bf.load = load i32, i32* %0 | ||
%bf.clear = and i32 %bf.load, -2 | ||
store i32 %bf.clear, i32* %0 | ||
ret void | ||
} | ||
|
||
define void @clear16(%struct.bit_fields* %ptr) { | ||
; CHECK-LABEL: clear16: | ||
; CHECK: # %bb.0: # %entry | ||
; CHECK-NEXT: andw $-2, (%rdi) | ||
; CHECK-NEXT: retq | ||
entry: | ||
%0 = bitcast %struct.bit_fields* %ptr to i16* | ||
%bf.load = load i16, i16* %0 | ||
%bf.clear = and i16 %bf.load, -2 | ||
store i16 %bf.clear, i16* %0 | ||
ret void | ||
} |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,18 @@ | ||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py | ||
; RUN: llc < %s -mtriple=x86_64-- -combiner-shrink-load-replace-store-with-store=false | FileCheck %s | ||
|
||
define void @shrink(i16* %ptr) { | ||
; CHECK-LABEL: shrink: | ||
; CHECK: # %bb.0: # %entry | ||
; CHECK-NEXT: movzbl (%rdi), %eax | ||
; CHECK-NEXT: orl $25600, %eax # imm = 0x6400 | ||
; CHECK-NEXT: movw %ax, (%rdi) | ||
; CHECK-NEXT: retq | ||
entry: | ||
%val = load i16, i16* %ptr | ||
%masked_val = and i16 %val, 255 | ||
%replaced_val = or i16 %masked_val, 25600 | ||
store i16 %replaced_val, i16* %ptr | ||
ret void | ||
} | ||
|