[m68k] Implement absolution long addressing mode for ADDA instruction

Reviewed By: myhsu Differential Revision: https://reviews.llvm.org/D143316
llvm · Jun 3, 2023 · 40d89de · 40d89de
1 parent 6595cb1
commit 40d89de
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Showing 3 changed files with 8 additions and 0 deletions.
diff --git a/llvm/lib/Target/M68k/M68kInstrArithmetic.td b/llvm/lib/Target/M68k/M68kInstrArithmetic.td
@@ -293,6 +293,8 @@ multiclass MxBiArOp_AF<string MN, SDNode NODE, bits<4> CMD> {
                                   CMD, MxEncAddrMode_p<"opd">>;
   def NAME#"32aj" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.JOp, MxType32.JPat,
                                   CMD, MxEncAddrMode_j<"opd">>;
+  def NAME#"32ab" : MxBiArOp_R_RM<MN, NODE, MxType32a, MxType32.BOp, MxType32.BPat,
+                                  CMD, MxEncAddrMode_abs<"opd", true>>;
   def NAME#"32ai" : MxBiArOp_R_RI_xEA<MN, NODE, MxType32a, CMD>;
 
   def NAME#"32ar" : MxBiArOp_R_RR_xEA<MN, NODE, MxType32a, MxType32r, CMD>;

diff --git a/llvm/test/MC/Disassembler/M68k/arithmetic.txt b/llvm/test/MC/Disassembler/M68k/arithmetic.txt
@@ -214,3 +214,6 @@
 
 # CHECK: or.l %d1, %d6
 0x8c 0x81
+
+# CHECK: adda.l  $f0001, %a0
+0xd1 0xf9 0x00 0x0f 0x00 0x01
diff --git a/llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRM.s b/llvm/test/MC/M68k/Arith/Classes/MxBiArOp_RFRM.s
@@ -67,3 +67,6 @@ add.w	(%a2), %d0
 ; CHECK:      adda.l  (%a1), %a3
 ; CHECK-SAME: encoding: [0xd7,0xd1]
 adda.l	(%a1), %a3
+; CHECK: adda.l dst, %a0
+; CHECK-SAME: encoding: [0xd1,0xf9,A,A,A,A]
+adda.l dst,%a0