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[ARM] Support .reloc *, R_ARM_NONE, *
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R_ARM_NONE can be used to create references among sections. When
--gc-sections is used, the referenced section will be retained if the
origin section is retained.

Add a generic MCFixupKind FK_NONE as this kind of no-op relocation is
ubiquitous on ELF and COFF, and probably available on many other binary
formats. See D62014.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D61992

llvm-svn: 360980
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MaskRay committed May 17, 2019
1 parent a74d654 commit 43ca0e9
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Showing 9 changed files with 64 additions and 10 deletions.
3 changes: 2 additions & 1 deletion llvm/include/llvm/MC/MCFixup.h
Expand Up @@ -20,7 +20,8 @@ class MCExpr;

/// Extensible enumeration to represent the type of a fixup.
enum MCFixupKind {
FK_Data_1 = 0, ///< A one-byte fixup.
FK_NONE = 0, ///< A no-op fixup.
FK_Data_1, ///< A one-byte fixup.
FK_Data_2, ///< A two-byte fixup.
FK_Data_4, ///< A four-byte fixup.
FK_Data_8, ///< A eight-byte fixup.
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1 change: 1 addition & 0 deletions llvm/lib/MC/MCAsmBackend.cpp
Expand Up @@ -64,6 +64,7 @@ Optional<MCFixupKind> MCAsmBackend::getFixupKind(StringRef Name) const {

const MCFixupKindInfo &MCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
static const MCFixupKindInfo Builtins[] = {
{"FK_NONE", 0, 0, 0},
{"FK_Data_1", 0, 8, 0},
{"FK_Data_2", 0, 16, 0},
{"FK_Data_4", 0, 32, 0},
Expand Down
18 changes: 17 additions & 1 deletion llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
Expand Up @@ -46,6 +46,13 @@ class ARMELFObjectWriter : public MCELFObjectTargetWriter {
};
} // end anonymous namespace

Optional<MCFixupKind> ARMAsmBackend::getFixupKind(StringRef Name) const {
if (STI.getTargetTriple().isOSBinFormatELF() && Name == "R_ARM_NONE")
return FK_NONE;

return MCAsmBackend::getFixupKind(Name);
}

const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
const static MCFixupKindInfo InfosLE[ARM::NumTargetFixupKinds] = {
// This table *must* be in the order that the fixup_* kinds are defined in
Expand Down Expand Up @@ -383,6 +390,7 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
default:
Ctx.reportError(Fixup.getLoc(), "bad relocation fixup type");
return 0;
case FK_NONE:
case FK_Data_1:
case FK_Data_2:
case FK_Data_4:
Expand Down Expand Up @@ -761,7 +769,9 @@ bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
const MCSymbolRefExpr *A = Target.getSymA();
const MCSymbol *Sym = A ? &A->getSymbol() : nullptr;
const unsigned FixupKind = Fixup.getKind() ;
if ((unsigned)Fixup.getKind() == ARM::fixup_arm_thumb_bl) {
if (FixupKind == FK_NONE)
return true;
if (FixupKind == ARM::fixup_arm_thumb_bl) {
assert(Sym && "How did we resolve this?");

// If the symbol is external the linker will handle it.
Expand Down Expand Up @@ -803,6 +813,9 @@ static unsigned getFixupKindNumBytes(unsigned Kind) {
default:
llvm_unreachable("Unknown fixup kind!");

case FK_NONE:
return 0;

case FK_Data_1:
case ARM::fixup_arm_thumb_bcc:
case ARM::fixup_arm_thumb_cp:
Expand Down Expand Up @@ -857,6 +870,9 @@ static unsigned getFixupKindContainerSizeBytes(unsigned Kind) {
default:
llvm_unreachable("Unknown fixup kind!");

case FK_NONE:
return 0;

case FK_Data_1:
return 1;
case FK_Data_2:
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h
Expand Up @@ -37,6 +37,8 @@ class ARMAsmBackend : public MCAsmBackend {
// different.
bool hasNOP() const { return STI.getFeatureBits()[ARM::HasV6T2Ops]; }

Optional<MCFixupKind> getFixupKind(StringRef Name) const override;

const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;

bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
Expand Down
2 changes: 2 additions & 0 deletions llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
Expand Up @@ -143,6 +143,8 @@ unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
default:
Ctx.reportFatalError(Fixup.getLoc(), "unsupported relocation on symbol");
return ELF::R_ARM_NONE;
case FK_NONE:
return ELF::R_ARM_NONE;
case FK_Data_1:
switch (Modifier) {
default:
Expand Down
4 changes: 1 addition & 3 deletions llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
Expand Up @@ -302,7 +302,7 @@ void MipsAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,

Optional<MCFixupKind> MipsAsmBackend::getFixupKind(StringRef Name) const {
return StringSwitch<Optional<MCFixupKind>>(Name)
.Case("R_MIPS_NONE", (MCFixupKind)Mips::fixup_Mips_NONE)
.Case("R_MIPS_NONE", FK_NONE)
.Case("R_MIPS_32", FK_Data_4)
.Case("R_MIPS_GOT_PAGE", (MCFixupKind)Mips::fixup_Mips_GOT_PAGE)
.Case("R_MIPS_CALL_HI16", (MCFixupKind)Mips::fixup_Mips_CALL_HI16)
Expand Down Expand Up @@ -350,7 +350,6 @@ getFixupKindInfo(MCFixupKind Kind) const {
// MipsFixupKinds.h.
//
// name offset bits flags
{ "fixup_Mips_NONE", 0, 0, 0 },
{ "fixup_Mips_16", 0, 16, 0 },
{ "fixup_Mips_32", 0, 32, 0 },
{ "fixup_Mips_REL32", 0, 32, 0 },
Expand Down Expand Up @@ -430,7 +429,6 @@ getFixupKindInfo(MCFixupKind Kind) const {
// MipsFixupKinds.h.
//
// name offset bits flags
{ "fixup_Mips_NONE", 0, 0, 0 },
{ "fixup_Mips_16", 16, 16, 0 },
{ "fixup_Mips_32", 0, 32, 0 },
{ "fixup_Mips_REL32", 0, 32, 0 },
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
Expand Up @@ -222,7 +222,7 @@ unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx,
unsigned Kind = (unsigned)Fixup.getKind();

switch (Kind) {
case Mips::fixup_Mips_NONE:
case FK_NONE:
return ELF::R_MIPS_NONE;
case FK_Data_1:
Ctx.reportError(Fixup.getLoc(),
Expand Down
5 changes: 1 addition & 4 deletions llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
Expand Up @@ -22,11 +22,8 @@ namespace Mips {
// in MipsAsmBackend.cpp.
//
enum Fixups {
// Branch fixups resulting in R_MIPS_NONE.
fixup_Mips_NONE = FirstTargetFixupKind,

// Branch fixups resulting in R_MIPS_16.
fixup_Mips_16,
fixup_Mips_16 = FirstTargetFixupKind,

// Pure 32 bit data fixup resulting in - R_MIPS_32.
fixup_Mips_32,
Expand Down
37 changes: 37 additions & 0 deletions llvm/test/MC/ARM/reloc-directive.s
@@ -0,0 +1,37 @@
# RUN: llvm-mc -triple=armv7-linux-gnueabi %s | FileCheck --check-prefix=PRINT %s
# RUN: llvm-mc -triple=armv7eb-linux-gnueabi %s | FileCheck --check-prefix=PRINT %s

# RUN: llvm-mc -filetype=obj -triple=armv7-linux-gnueabi %s -o %t
# RUN: llvm-readobj -r %t | FileCheck %s
# RUN: llvm-readelf -x .data %t | FileCheck --check-prefix=HEX %s

# RUN: llvm-mc -filetype=obj -triple=armv7eb-linux-gnueabi %s -o %t
# RUN: llvm-readobj -r %t | FileCheck %s
# RUN: llvm-readelf -x .data %t | FileCheck --check-prefix=HEX %s

.text
bx lr
nop
nop
.reloc 8, R_ARM_NONE, .data
.reloc 4, R_ARM_NONE, foo+4
.reloc 0, R_ARM_NONE, 8

.data
.globl foo
foo:
.word 0
.word 0
.word 0

# PRINT: .reloc 8, R_ARM_NONE, .data
# PRINT: .reloc 4, R_ARM_NONE, foo+4
# PRINT: .reloc 0, R_ARM_NONE, 8

# ARM relocations use the Elf32_Rel format. Addends are neither stored in the
# relocation entries nor applied in the referenced locations.
# CHECK: 0x8 R_ARM_NONE .data 0x0
# CHECK-NEXT: 0x4 R_ARM_NONE foo 0x0
# CHECK-NEXT: 0x0 R_ARM_NONE - 0x0

# HEX: 0x00000000 00000000 00000000

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