Revert "[AArch64] Generate AND in place of CSEL for predicated CTTZ"

This reverts commit 7dcd0ea due to
issues reported postcommit with the correctness of truncated cttzs.

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -17630,45 +17630,6 @@ static SDValue performBRCONDCombine(SDNode *N,
   return SDValue();
 }
 
-static SDValue foldCSELofCTTZ(SDNode *N, SelectionDAG &DAG) {
-  unsigned CC = N->getConstantOperandVal(2);
-  SDValue SUBS = N->getOperand(3);
-  SDValue Zero, CTTZ;
-
-  if (CC == AArch64CC::EQ && SUBS.getOpcode() == AArch64ISD::SUBS) {
-    Zero = N->getOperand(0);
-    CTTZ = N->getOperand(1);
-  } else if (CC == AArch64CC::NE && SUBS.getOpcode() == AArch64ISD::SUBS) {
-    Zero = N->getOperand(1);
-    CTTZ = N->getOperand(0);
-  } else
-    return SDValue();
-
-  if ((CTTZ.getOpcode() != ISD::CTTZ && CTTZ.getOpcode() != ISD::TRUNCATE) ||
-      (CTTZ.getOpcode() == ISD::TRUNCATE &&
-       CTTZ.getOperand(0).getOpcode() != ISD::CTTZ))
-    return SDValue();
-
-  assert((CTTZ.getValueType() == MVT::i32 || CTTZ.getValueType() == MVT::i64) &&
-         "Illegal type in CTTZ folding");
-
-  if (!isNullConstant(Zero) || !isNullConstant(SUBS.getOperand(1)))
-    return SDValue();
-
-  SDValue X = CTTZ.getOpcode() == ISD::TRUNCATE
-                  ? CTTZ.getOperand(0).getOperand(0)
-                  : CTTZ.getOperand(0);
-
-  if (X != SUBS.getOperand(0))
-    return SDValue();
-
-  unsigned BitWidth = CTTZ.getValueSizeInBits();
-  SDValue BitWidthMinusOne =
-      DAG.getConstant(BitWidth - 1, SDLoc(N), CTTZ.getValueType());
-  return DAG.getNode(ISD::AND, SDLoc(N), CTTZ.getValueType(), CTTZ,
-                     BitWidthMinusOne);
-}
-
 // Optimize CSEL instructions
 static SDValue performCSELCombine(SDNode *N,
                                   TargetLowering::DAGCombinerInfo &DCI,
@@ -17677,11 +17638,6 @@ static SDValue performCSELCombine(SDNode *N,
   if (N->getOperand(0) == N->getOperand(1))
     return N->getOperand(0);
 
-  // CSEL 0, cttz(X), eq(X, 0) -> AND cttz bitwidth-1
-  // CSEL cttz(X), 0, ne(X, 0) -> AND cttz bitwidth-1
-  if (SDValue Folded = foldCSELofCTTZ(N, DAG))
-    return Folded;
-
   return performCONDCombine(N, DCI, DAG, 2, 3);
 }