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[ScopInfo] Simplify new access functions under domain context
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Summary:
We do not keep domain constraints on access functions when building the
scop. Hence, for consistency reasons, it makes also sense to not include
them when storing a new access function. This change results in simpler
access functions that make output easier to read.

This patch also helps to make DeLICMed memory accesses to be understood by
our matrix multiplication pattern matching pass. Further changes to the
matrix multiplication pattern matching are needed for this to work, so the
corresponding test case will be added in a future commit.

Reviewers: Meinersbur, bollu, gareevroman, efriedma, huihuiz, sebpop, simbuerg

Subscribers: pollydev, llvm-commits

Tags: #polly

Differential Revision: https://reviews.llvm.org/D35237

llvm-svn: 308215
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@tobiasgrosser
tobiasgrosser committed Jul 17, 2017
1 parent 8d8916d commit 4556c9b
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Showing 14 changed files with 118 additions and 117 deletions.
1 change: 1 addition & 0 deletions polly/lib/Analysis/ScopInfo.cpp
View file
Expand Up @@ -1240,6 +1240,7 @@ void MemoryAccess::setNewAccessRelation(__isl_take isl_map *NewAccess) {
#endif

isl_map_free(NewAccessRelation);
NewAccess = isl_map_gist_domain(NewAccess, getStatement()->getDomain());
NewAccessRelation = NewAccess;
}

Expand Down
16 changes: 8 additions & 8 deletions polly/test/DeLICM/reduction.ll
View file
Expand Up @@ -60,32 +60,32 @@ return:
; CHECK-NEXT: Stmt_outer_for
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_outer_for[i0] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: { Stmt_outer_for[i0] -> MemRef_A[i0] : 0 <= i0 <= 1 };
; CHECK-NEXT: new: { Stmt_outer_for[i0] -> MemRef_A[i0] : i0 <= 1 };
; CHECK-NEXT: Stmt_reduction_for
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_for[i0, i1] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 4 };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_for[i0, i1] -> MemRef_phi[] };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 4 };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_body
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0, i1] -> MemRef_add[] };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0, i1] -> MemRef_phi[] };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_reduction_inc
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_inc[i0, i1] -> MemRef_add[] };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_inc[i0, i1] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_reduction_exit
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_reduction_exit[i0] -> MemRef_A[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_exit[i0] -> MemRef_phi[] };
; CHECK-NEXT: new: { Stmt_reduction_exit[i0] -> MemRef_A[i0] : 0 <= i0 <= 1 };
; CHECK-NEXT: new: { Stmt_reduction_exit[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
16 changes: 8 additions & 8 deletions polly/test/DeLICM/reduction_constant_selfconflict.ll
View file
Expand Up @@ -69,34 +69,34 @@ return:
; CHECK-NEXT: Stmt_reduction_preheader
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_preheader[i0] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: { Stmt_reduction_preheader[i0] -> MemRef_A[i0] : 0 <= i0 <= 1 };
; CHECK-NEXT: new: { Stmt_reduction_preheader[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_reduction_for
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_for[i0, i1] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 4 };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_for[i0, i1] -> MemRef_phi[] };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 4 };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_body
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0, i1] -> MemRef_add[] };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0, i1] -> MemRef_phi[] };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and i1 >= 0 and -5i0 <= i1 <= 8 - 5i0 and i1 <= 3 };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_body[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_reduction_inc
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_inc[i0, i1] -> MemRef_add[] };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : i1 >= 0 and -5i0 <= i1 <= 7 - 5i0 and i1 <= 3; Stmt_reduction_inc[1, 3] -> MemRef_A[1] };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : i1 <= 7 - 5i0; Stmt_reduction_inc[1, 3] -> MemRef_A[1] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_inc[i0, i1] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and i1 >= 0 and -5i0 <= i1 <= 3 };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_reduction_exit
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_reduction_exit[i0] -> MemRef_A[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_exit[i0] -> MemRef_phi[] };
; CHECK-NEXT: new: { Stmt_reduction_exit[i0] -> MemRef_A[i0] : 0 <= i0 <= 1 };
; CHECK-NEXT: new: { Stmt_reduction_exit[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }
28 changes: 14 additions & 14 deletions polly/test/DeLICM/reduction_looprotate_gvnpre.ll
View file
Expand Up @@ -68,59 +68,59 @@ return:
; CHECK-NEXT: Stmt_reduction_preheader
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_preheader[i0] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: { Stmt_reduction_preheader[i0] -> MemRef_A[i0] : 0 <= i0 <= 1 };
; CHECK-NEXT: new: { Stmt_reduction_preheader[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_reduction_for
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_for[i0, i1] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_for[i0, i1] -> MemRef_phi[] };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; CHECK-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_body
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0, i1] -> MemRef_add[] };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 and 3i1 <= 22 - 13i0 };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_body[i0, i1] -> MemRef_phi[] };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : i0 >= 0 and 0 <= i1 <= 3 and 3i1 <= 21 - 13i0; Stmt_body[1, 3] -> MemRef_A[1] };
; CHECK-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : 3i1 <= 21 - 13i0; Stmt_body[1, 3] -> MemRef_A[1] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: { Stmt_body[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_reduction_inc
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_inc[i0, i1] -> MemRef_add[] };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : i0 >= 0 and 0 <= i1 <= 3 and 3i1 <= 21 - 13i0; Stmt_reduction_inc[1, 3] -> MemRef_A[1] };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : 3i1 <= 21 - 13i0; Stmt_reduction_inc[1, 3] -> MemRef_A[1] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: { Stmt_reduction_inc[i0, i1] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; CHECK-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] };
; CHECK-NEXT: }


; PARTIAL: After accesses {
; PARTIAL-NEXT: Stmt_reduction_preheader
; PARTIAL-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; PARTIAL-NEXT: { Stmt_reduction_preheader[i0] -> MemRef_phi__phi[] };
; PARTIAL-NEXT: new: { Stmt_reduction_preheader[i0] -> MemRef_A[i0] : 0 <= i0 <= 1 };
; PARTIAL-NEXT: new: { Stmt_reduction_preheader[i0] -> MemRef_A[i0] };
; PARTIAL-NEXT: Stmt_reduction_for
; PARTIAL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; PARTIAL-NEXT: { Stmt_reduction_for[i0, i1] -> MemRef_phi__phi[] };
; PARTIAL-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; PARTIAL-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] };
; PARTIAL-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; PARTIAL-NEXT: { Stmt_reduction_for[i0, i1] -> MemRef_phi[] };
; PARTIAL-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 };
; PARTIAL-NEXT: new: { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] };
; PARTIAL-NEXT: Stmt_body
; PARTIAL-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; PARTIAL-NEXT: { Stmt_body[i0, i1] -> MemRef_add[] };
; PARTIAL-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 3 and 3i1 <= 22 - 13i0 };
; PARTIAL-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] };
; PARTIAL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; PARTIAL-NEXT: { Stmt_body[i0, i1] -> MemRef_phi[] };
; PARTIAL-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : i0 >= 0 and 0 <= i1 <= 3 and 3i1 <= 21 - 13i0; Stmt_body[1, 3] -> MemRef_A[1] };
; PARTIAL-NEXT: new: { Stmt_body[i0, i1] -> MemRef_A[i0] : 3i1 <= 21 - 13i0; Stmt_body[1, 3] -> MemRef_A[1] };
; PARTIAL-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; PARTIAL-NEXT: { Stmt_body[i0, i1] -> MemRef_A[i0] };
; PARTIAL-NEXT: Stmt_reduction_inc
; PARTIAL-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; PARTIAL-NEXT: { Stmt_reduction_inc[i0, i1] -> MemRef_add[] };
; PARTIAL-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : i0 >= 0 and 0 <= i1 <= 3 and 3i1 <= 21 - 13i0; Stmt_reduction_inc[1, 3] -> MemRef_A[1] };
; PARTIAL-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : 3i1 <= 21 - 13i0; Stmt_reduction_inc[1, 3] -> MemRef_A[1] };
; PARTIAL-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; PARTIAL-NEXT: { Stmt_reduction_inc[i0, i1] -> MemRef_phi__phi[] };
; PARTIAL-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 <= i1 <= 2 and 3i1 >= -13i0 };
; PARTIAL-NEXT: new: { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : i1 <= 2 };
; PARTIAL-NEXT: }
16 changes: 8 additions & 8 deletions polly/test/DeLICM/reduction_looprotate_hoisted.ll
View file
Expand Up @@ -70,32 +70,32 @@ return:
; CHECK-NEXT: Stmt_reduction_preheader
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [Start] -> { Stmt_reduction_preheader[i0] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_preheader[i0] -> MemRef_A[i0] : 0 <= i0 <= 1 };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_preheader[i0] -> MemRef_A[i0] };
; CHECK-NEXT: Stmt_reduction_for
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and -i0 < i1 <= 3 - Start; Stmt_reduction_for[1, 0] -> MemRef_A[1] : Start >= 4; Stmt_reduction_for[0, 0] -> MemRef_A[0] };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : -i0 < i1 <= 3 - Start; Stmt_reduction_for[1, 0] -> MemRef_A[1] : Start >= 4; Stmt_reduction_for[0, 0] -> MemRef_A[0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_phi[] };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and i0 <= i1 <= 3 - Start; Stmt_reduction_for[i0, 0] -> MemRef_A[i0] : 0 <= i0 <= 1 and i0 <= -4 + Start; Stmt_reduction_for[1, 0] -> MemRef_A[1] : Start <= 4 };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_for[i0, i1] -> MemRef_A[i0] : i0 <= i1 <= 3 - Start; Stmt_reduction_for[i0, 0] -> MemRef_A[i0] : i0 <= -4 + Start; Stmt_reduction_for[1, 0] -> MemRef_A[1] : Start <= 4 }
; CHECK-NEXT: Stmt_body
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [Start] -> { Stmt_body[i0, i1] -> MemRef_mul[] };
; CHECK-NEXT: new: [Start] -> { Stmt_body[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and i0 <= i1 <= 3 - Start; Stmt_body[i0, 0] -> MemRef_A[i0] : 0 <= i0 <= 1 and i0 <= -4 + Start; Stmt_body[1, 0] -> MemRef_A[1] : Start <= 4 };
; CHECK-NEXT: new: [Start] -> { Stmt_body[i0, i1] -> MemRef_A[i0] : i0 <= i1 <= 3 - Start; Stmt_body[i0, 0] -> MemRef_A[i0] : i0 <= -4 + Start; Stmt_body[1, 0] -> MemRef_A[1] : Start <= 4 }
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [Start] -> { Stmt_body[i0, i1] -> MemRef_phi[] };
; CHECK-NEXT: new: [Start] -> { Stmt_body[i0, i1] -> MemRef_A[i0] : Start <= 3 and 0 <= i0 <= 1 and i0 <= i1 <= 3 - Start; Stmt_body[1, 0] -> MemRef_A[1]; Stmt_body[0, 0] -> MemRef_A[0] : Start >= 4 };
; CHECK-NEXT: new: [Start] -> { Stmt_body[i0, i1] -> MemRef_A[i0] : i0 <= i1 <= 3 - Start; Stmt_body[1, 0] -> MemRef_A[1]; Stmt_body[0, 0] -> MemRef_A[0] : Start >= 4 };
; CHECK-NEXT: Stmt_reduction_inc
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_mul[] };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : Start <= 3 and 0 <= i0 <= 1 and i0 <= i1 <= 3 - Start; Stmt_reduction_inc[1, 0] -> MemRef_A[1]; Stmt_reduction_inc[0, 0] -> MemRef_A[0] : Start >= 4 };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : i0 <= i1 <= 3 - Start; Stmt_reduction_inc[1, 0] -> MemRef_A[1]; Stmt_reduction_inc[0, 0] -> MemRef_A[0] : Start >= 4 };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_phi__phi[] };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : 0 <= i0 <= 1 and 0 < i1 <= 3 - Start; Stmt_reduction_inc[i0, 0] -> MemRef_A[i0] : 0 <= i0 <= 1 };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_inc[i0, i1] -> MemRef_A[i0] : 0 < i1 <= 3 - Start; Stmt_reduction_inc[i0, 0] -> MemRef_A[i0] }
; CHECK-NEXT: Stmt_reduction_exit
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [Start] -> { Stmt_reduction_exit[i0] -> MemRef_A[i0] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [Start] -> { Stmt_reduction_exit[i0] -> MemRef_mul[] };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_exit[i0] -> MemRef_A[i0] : 0 <= i0 <= 1 };
; CHECK-NEXT: new: [Start] -> { Stmt_reduction_exit[i0] -> MemRef_A[i0] };
; CHECK-NEXT: }

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