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[InstCombine] Fix incorrect fshr to fshl transform
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This transform is only valid if the (modular) shift amount is not
zero.

Proof: https://alive2.llvm.org/ce/z/WBxn-x

Fixes #89338.
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nikic committed Apr 19, 2024
1 parent ab1d988 commit 46957a1
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Showing 2 changed files with 5 additions and 3 deletions.
5 changes: 4 additions & 1 deletion llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1988,7 +1988,10 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
// is not entirely arbitrary. For historical reasons, the backend may
// recognize rotate left patterns but miss rotate right patterns.
if (IID == Intrinsic::fshr) {
// fshr X, Y, C --> fshl X, Y, (BitWidth - C)
// fshr X, Y, C --> fshl X, Y, (BitWidth - C) if C is not zero.
if (!isKnownNonZero(ShAmtC, SQ.getWithInstruction(II)))
return nullptr;

Constant *LeftShiftC = ConstantExpr::getSub(WidthC, ShAmtC);
Module *Mod = II->getModule();
Function *Fshl = Intrinsic::getDeclaration(Mod, Intrinsic::fshl, Ty);
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3 changes: 1 addition & 2 deletions llvm/test/Transforms/InstCombine/fsh.ll
Original file line number Diff line number Diff line change
Expand Up @@ -1002,10 +1002,9 @@ define <2 x i32> @fsh_unary_shuffle_ops_partial_widening(<3 x i32> %x, <2 x i32>
ret <2 x i32> %r
}

; FIXME: This is a miscompile.
define <2 x i32> @fshr_vec_zero_elem(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @fshr_vec_zero_elem(
; CHECK-NEXT: [[FSH:%.*]] = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> <i32 30, i32 0>)
; CHECK-NEXT: [[FSH:%.*]] = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> <i32 2, i32 0>)
; CHECK-NEXT: ret <2 x i32> [[FSH]]
;
%fsh = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> <i32 2, i32 0>)
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