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[AArch64][GlobalISel] Legalize scalar G_FMAXIMUM + G_FMINIMUM
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Necessary for implementing some combines on floating point selects.

Differential Revision: https://reviews.llvm.org/D115372
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Jessica Paquette committed Dec 9, 2021
1 parent f72e509 commit 47e1f67
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Showing 4 changed files with 170 additions and 4 deletions.
5 changes: 5 additions & 0 deletions llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
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Expand Up @@ -785,6 +785,11 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
.libcallFor({s128})
.minScalar(0, MinFPScalar);

// TODO: Vector types.
getActionDefinitionsBuilder({G_FMAXIMUM, G_FMINIMUM})
.legalFor({MinFPScalar, s32, s64})
.minScalar(0, MinFPScalar);

// TODO: Libcall support for s128.
// TODO: s16 should be legal with full FP16 support.
getActionDefinitionsBuilder({G_LROUND, G_LLROUND})
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80 changes: 80 additions & 0 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaximum.mir
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@@ -0,0 +1,80 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=FP16
# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=NO-FP16
...
---
name: s16_legal_with_full_fp16
alignment: 4
body: |
bb.0:
liveins: $h0, $h1
; FP16-LABEL: name: s16_legal_with_full_fp16
; FP16: %a:_(s16) = COPY $h0
; FP16-NEXT: %b:_(s16) = COPY $h1
; FP16-NEXT: %legalize_me:_(s16) = G_FMAXIMUM %a, %b
; FP16-NEXT: $h0 = COPY %legalize_me(s16)
; FP16-NEXT: RET_ReallyLR implicit $h0
; NO-FP16-LABEL: name: s16_legal_with_full_fp16
; NO-FP16: %a:_(s16) = COPY $h0
; NO-FP16-NEXT: %b:_(s16) = COPY $h1
; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT %a(s16)
; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT %b(s16)
; NO-FP16-NEXT: [[FMAXIMUM:%[0-9]+]]:_(s32) = G_FMAXIMUM [[FPEXT]], [[FPEXT1]]
; NO-FP16-NEXT: %legalize_me:_(s16) = G_FPTRUNC [[FMAXIMUM]](s32)
; NO-FP16-NEXT: $h0 = COPY %legalize_me(s16)
; NO-FP16-NEXT: RET_ReallyLR implicit $h0
%a:_(s16) = COPY $h0
%b:_(s16) = COPY $h1
%legalize_me:_(s16) = G_FMAXIMUM %a, %b
$h0 = COPY %legalize_me(s16)
RET_ReallyLR implicit $h0
...
---
name: s32_legal
alignment: 4
body: |
bb.0:
liveins: $s0, $s1
; FP16-LABEL: name: s32_legal
; FP16: %a:_(s32) = COPY $s0
; FP16-NEXT: %b:_(s32) = COPY $s1
; FP16-NEXT: %legalize_me:_(s32) = G_FMAXIMUM %a, %b
; FP16-NEXT: $s0 = COPY %legalize_me(s32)
; FP16-NEXT: RET_ReallyLR implicit $s0
; NO-FP16-LABEL: name: s32_legal
; NO-FP16: %a:_(s32) = COPY $s0
; NO-FP16-NEXT: %b:_(s32) = COPY $s1
; NO-FP16-NEXT: %legalize_me:_(s32) = G_FMAXIMUM %a, %b
; NO-FP16-NEXT: $s0 = COPY %legalize_me(s32)
; NO-FP16-NEXT: RET_ReallyLR implicit $s0
%a:_(s32) = COPY $s0
%b:_(s32) = COPY $s1
%legalize_me:_(s32) = G_FMAXIMUM %a, %b
$s0 = COPY %legalize_me(s32)
RET_ReallyLR implicit $s0
...
---
name: s64_legal
alignment: 4
body: |
bb.0:
liveins: $d0, $d1
; FP16-LABEL: name: s64_legal
; FP16: %a:_(s64) = COPY $d0
; FP16-NEXT: %b:_(s64) = COPY $d1
; FP16-NEXT: %legalize_me:_(s64) = G_FMAXIMUM %a, %b
; FP16-NEXT: $d0 = COPY %legalize_me(s64)
; FP16-NEXT: RET_ReallyLR implicit $d0
; NO-FP16-LABEL: name: s64_legal
; NO-FP16: %a:_(s64) = COPY $d0
; NO-FP16-NEXT: %b:_(s64) = COPY $d1
; NO-FP16-NEXT: %legalize_me:_(s64) = G_FMAXIMUM %a, %b
; NO-FP16-NEXT: $d0 = COPY %legalize_me(s64)
; NO-FP16-NEXT: RET_ReallyLR implicit $d0
%a:_(s64) = COPY $d0
%b:_(s64) = COPY $d1
%legalize_me:_(s64) = G_FMAXIMUM %a, %b
$d0 = COPY %legalize_me(s64)
RET_ReallyLR implicit $d0
80 changes: 80 additions & 0 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminimum.mir
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@@ -0,0 +1,80 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=FP16
# RUN: llc -mtriple=aarch64-unknown-unknown -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=NO-FP16
...
---
name: s16_legal_with_full_fp16
alignment: 4
body: |
bb.0:
liveins: $h0, $h1
; FP16-LABEL: name: s16_legal_with_full_fp16
; FP16: %a:_(s16) = COPY $h0
; FP16-NEXT: %b:_(s16) = COPY $h1
; FP16-NEXT: %legalize_me:_(s16) = G_FMINIMUM %a, %b
; FP16-NEXT: $h0 = COPY %legalize_me(s16)
; FP16-NEXT: RET_ReallyLR implicit $h0
; NO-FP16-LABEL: name: s16_legal_with_full_fp16
; NO-FP16: %a:_(s16) = COPY $h0
; NO-FP16-NEXT: %b:_(s16) = COPY $h1
; NO-FP16-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT %a(s16)
; NO-FP16-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT %b(s16)
; NO-FP16-NEXT: [[FMINIMUM:%[0-9]+]]:_(s32) = G_FMINIMUM [[FPEXT]], [[FPEXT1]]
; NO-FP16-NEXT: %legalize_me:_(s16) = G_FPTRUNC [[FMINIMUM]](s32)
; NO-FP16-NEXT: $h0 = COPY %legalize_me(s16)
; NO-FP16-NEXT: RET_ReallyLR implicit $h0
%a:_(s16) = COPY $h0
%b:_(s16) = COPY $h1
%legalize_me:_(s16) = G_FMINIMUM %a, %b
$h0 = COPY %legalize_me(s16)
RET_ReallyLR implicit $h0
...
---
name: s32_legal
alignment: 4
body: |
bb.0:
liveins: $s0, $s1
; FP16-LABEL: name: s32_legal
; FP16: %a:_(s32) = COPY $s0
; FP16-NEXT: %b:_(s32) = COPY $s1
; FP16-NEXT: %legalize_me:_(s32) = G_FMINIMUM %a, %b
; FP16-NEXT: $s0 = COPY %legalize_me(s32)
; FP16-NEXT: RET_ReallyLR implicit $s0
; NO-FP16-LABEL: name: s32_legal
; NO-FP16: %a:_(s32) = COPY $s0
; NO-FP16-NEXT: %b:_(s32) = COPY $s1
; NO-FP16-NEXT: %legalize_me:_(s32) = G_FMINIMUM %a, %b
; NO-FP16-NEXT: $s0 = COPY %legalize_me(s32)
; NO-FP16-NEXT: RET_ReallyLR implicit $s0
%a:_(s32) = COPY $s0
%b:_(s32) = COPY $s1
%legalize_me:_(s32) = G_FMINIMUM %a, %b
$s0 = COPY %legalize_me(s32)
RET_ReallyLR implicit $s0
...
---
name: s64_legal
alignment: 4
body: |
bb.0:
liveins: $d0, $d1
; FP16-LABEL: name: s64_legal
; FP16: %a:_(s64) = COPY $d0
; FP16-NEXT: %b:_(s64) = COPY $d1
; FP16-NEXT: %legalize_me:_(s64) = G_FMINIMUM %a, %b
; FP16-NEXT: $d0 = COPY %legalize_me(s64)
; FP16-NEXT: RET_ReallyLR implicit $d0
; NO-FP16-LABEL: name: s64_legal
; NO-FP16: %a:_(s64) = COPY $d0
; NO-FP16-NEXT: %b:_(s64) = COPY $d1
; NO-FP16-NEXT: %legalize_me:_(s64) = G_FMINIMUM %a, %b
; NO-FP16-NEXT: $d0 = COPY %legalize_me(s64)
; NO-FP16-NEXT: RET_ReallyLR implicit $d0
%a:_(s64) = COPY $d0
%b:_(s64) = COPY $d1
%legalize_me:_(s64) = G_FMINIMUM %a, %b
$d0 = COPY %legalize_me(s64)
RET_ReallyLR implicit $d0
9 changes: 5 additions & 4 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
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Expand Up @@ -497,11 +497,12 @@
# DEBUG: .. type index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: G_FMINIMUM (opcode {{[0-9]+}}): 1 type index
# DEBUG: .. type index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
# DEBUG-NEXT: .. the first uncovered type index: 1, OK
# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
# DEBUG-NEXT: G_FMAXIMUM (opcode {{[0-9]+}}): 1 type index
# DEBUG: .. type index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. the first uncovered type index: 1, OK
# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
# DEBUG-NEXT: G_PTR_ADD (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
# DEBUG-NEXT: .. the first uncovered type index: 2, OK
# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
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