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[DPWBS-1180] Adding Instruction Selection support for G_FMUL and the …
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…corresponding test case.
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Zoltan Toth authored and konstantinschwarz committed Feb 5, 2020
1 parent 7d4d4ea commit 484a046
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2 changes: 2 additions & 0 deletions llvm/lib/Target/TriCore/TriCoreGISelPattern.td
Expand Up @@ -172,6 +172,8 @@ def : SimpleBinOpPat<fadd, ADDF_ddd>;
def : SimpleBinOpPat<fadd, ADDDF_eee, ExtDataRegs>;
def : SimpleBinOpPat<fsub, SUBF_ddd>;
def : SimpleBinOpPat<fsub, SUBDF_eee, ExtDataRegs>;
def : SimpleBinOpPat<fmul, MULF_ddd>;
def : SimpleBinOpPat<fmul, MULDF_eee, ExtDataRegs>;

//===----------------------------------------------------------------------===//
// Others
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49 changes: 49 additions & 0 deletions llvm/test/CodeGen/TriCore/GlobalIsel/select-binop.mir
Expand Up @@ -411,3 +411,52 @@ body: |
$e4 = COPY %2(s64)
...

---
name: fmul_s32
legalized: true
regBankSelected: true

registers:
- { id: 0, class: dataregbank }
- { id: 1, class: dataregbank }
- { id: 2, class: dataregbank }

body: |
bb.0:
liveins: $d4, $d5
; CHECK-LABEL: name: fmul_s32
; CHECK: [[COPY:%[0-9]+]]:dataregs = COPY $d4
; CHECK: [[COPY1:%[0-9]+]]:dataregs = COPY $d5
; CHECK: [[MULF:%[0-9]+]]:dataregs = MULF_ddd [[COPY]], [[COPY1]], implicit-def $psw
; CHECK: $d4 = COPY [[MULF]]
%0(s32) = COPY $d4
%1(s32) = COPY $d5
%2(s32) = G_FMUL %0, %1
$d4 = COPY %2(s32)
...

---
name: fmul_s64
legalized: true
regBankSelected: true

registers:
- { id: 0, class: dataregbank }
- { id: 1, class: dataregbank }
- { id: 2, class: dataregbank }

body: |
bb.0:
liveins: $e4, $e6
; CHECK-LABEL: name: fmul_s64
; CHECK: [[COPY:%[0-9]+]]:extdataregs = COPY $e4
; CHECK: [[COPY1:%[0-9]+]]:extdataregs = COPY $e6
; CHECK: [[MULDF:%[0-9]+]]:extdataregs = MULDF_eee [[COPY]], [[COPY1]], implicit-def $psw
; CHECK: $e4 = COPY [[MULDF]]
%0(s64) = COPY $e4
%1(s64) = COPY $e6
%2(s64) = G_FMUL %0, %1
$e4 = COPY %2(s64)
...

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