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Fix memory leaks by avoiding extra manual dynamic allocation
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Improvement to r244212.

llvm-svn: 244252
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@dwblaikie
dwblaikie committed Aug 6, 2015
1 parent 28dc417 commit 4ab57cd
Showing 1 changed file with 41 additions and 57 deletions.
98 changes: 41 additions & 57 deletions llvm/utils/TableGen/AsmWriterEmitter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -736,14 +736,13 @@ class IAPrinter {
O.indent(4) << '}';
}

bool operator==(const IAPrinter &RHS) {
bool operator==(const IAPrinter &RHS) const {
if (Conds.size() != RHS.Conds.size())
return false;

unsigned Idx = 0;
for (std::vector<std::string>::iterator
I = Conds.begin(), E = Conds.end(); I != E; ++I)
if (*I != RHS.Conds[Idx++])
for (const auto &str : Conds)
if (str != RHS.Conds[Idx++])
return false;

return true;
Expand All @@ -762,12 +761,12 @@ static unsigned CountNumOperands(StringRef AsmString, unsigned Variant) {

namespace {
struct AliasPriorityComparator {
typedef std::pair<CodeGenInstAlias *, int> ValueType;
typedef std::pair<CodeGenInstAlias, int> ValueType;
bool operator()(const ValueType &LHS, const ValueType &RHS) {
if (LHS.second == RHS.second) {
// We don't actually care about the order, but for consistency it
// shouldn't depend on pointer comparisons.
return LHS.first->TheDef->getName() < RHS.first->TheDef->getName();
return LHS.first.TheDef->getName() < RHS.first.TheDef->getName();
}

// Aliases with larger priorities should be considered first.
Expand Down Expand Up @@ -796,60 +795,58 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
Records.getAllDerivedDefinitions("InstAlias");

// Create a map from the qualified name to a list of potential matches.
typedef std::set<std::pair<CodeGenInstAlias*, int>, AliasPriorityComparator>
typedef std::set<std::pair<CodeGenInstAlias, int>, AliasPriorityComparator>
AliasWithPriority;
std::map<std::string, AliasWithPriority> AliasMap;
for (std::vector<Record*>::iterator
I = AllInstAliases.begin(), E = AllInstAliases.end(); I != E; ++I) {
CodeGenInstAlias *Alias = new CodeGenInstAlias(*I, Variant, Target);
const Record *R = *I;
int Priority = R->getValueAsInt("EmitPriority");
if (Priority < 1)
continue; // Aliases with priority 0 are never emitted.

const DagInit *DI = R->getValueAsDag("ResultInst");
const DefInit *Op = cast<DefInit>(DI->getOperator());
AliasMap[getQualifiedName(Op->getDef())].insert(std::make_pair(Alias,
Priority));
AliasMap[getQualifiedName(Op->getDef())].insert(
std::make_pair(CodeGenInstAlias(*I, Variant, Target), Priority));
}

// A map of which conditions need to be met for each instruction operand
// before it can be matched to the mnemonic.
std::map<std::string, std::vector<IAPrinter*> > IAPrinterMap;
std::map<std::string, std::vector<IAPrinter>> IAPrinterMap;

// A list of MCOperandPredicates for all operands in use, and the reverse map
std::vector<const Record*> MCOpPredicates;
DenseMap<const Record*, unsigned> MCOpPredicateMap;

for (auto &Aliases : AliasMap) {
for (auto &Alias : Aliases.second) {
const CodeGenInstAlias *CGA = Alias.first;
unsigned LastOpNo = CGA->ResultInstOperandIndex.size();
const CodeGenInstAlias &CGA = Alias.first;
unsigned LastOpNo = CGA.ResultInstOperandIndex.size();
unsigned NumResultOps =
CountNumOperands(CGA->ResultInst->AsmString, Variant);
CountNumOperands(CGA.ResultInst->AsmString, Variant);

// Don't emit the alias if it has more operands than what it's aliasing.
if (NumResultOps < CountNumOperands(CGA->AsmString, Variant))
if (NumResultOps < CountNumOperands(CGA.AsmString, Variant))
continue;

IAPrinter *IAP = new IAPrinter(CGA->Result->getAsString(),
CGA->AsmString);
IAPrinter IAP(CGA.Result->getAsString(), CGA.AsmString);

unsigned NumMIOps = 0;
for (auto &Operand : CGA->ResultOperands)
for (auto &Operand : CGA.ResultOperands)
NumMIOps += Operand.getMINumOperands();

std::string Cond;
Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(NumMIOps);
IAP->addCond(Cond);
IAP.addCond(Cond);

bool CantHandle = false;

unsigned MIOpNum = 0;
for (unsigned i = 0, e = LastOpNo; i != e; ++i) {
std::string Op = "MI->getOperand(" + llvm::utostr(MIOpNum) + ")";

const CodeGenInstAlias::ResultOperand &RO = CGA->ResultOperands[i];
const CodeGenInstAlias::ResultOperand &RO = CGA.ResultOperands[i];

switch (RO.Kind) {
case CodeGenInstAlias::ResultOperand::K_Record: {
Expand All @@ -875,24 +872,24 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
if (Rec->isSubClassOf("RegisterOperand"))
Rec = Rec->getValueAsDef("RegClass");
if (Rec->isSubClassOf("RegisterClass")) {
IAP->addCond(Op + ".isReg()");
IAP.addCond(Op + ".isReg()");

if (!IAP->isOpMapped(ROName)) {
IAP->addOperand(ROName, MIOpNum, PrintMethodIdx);
Record *R = CGA->ResultOperands[i].getRecord();
if (!IAP.isOpMapped(ROName)) {
IAP.addOperand(ROName, MIOpNum, PrintMethodIdx);
Record *R = CGA.ResultOperands[i].getRecord();
if (R->isSubClassOf("RegisterOperand"))
R = R->getValueAsDef("RegClass");
Cond = std::string("MRI.getRegClass(") + Target.getName() + "::" +
R->getName() + "RegClassID)"
".contains(" + Op + ".getReg())";
} else {
Cond = Op + ".getReg() == MI->getOperand(" +
llvm::utostr(IAP->getOpIndex(ROName)) + ").getReg()";
llvm::utostr(IAP.getOpIndex(ROName)) + ").getReg()";
}
} else {
// Assume all printable operands are desired for now. This can be
// overridden in the InstAlias instantiation if necessary.
IAP->addOperand(ROName, MIOpNum, PrintMethodIdx);
IAP.addOperand(ROName, MIOpNum, PrintMethodIdx);

// There might be an additional predicate on the MCOperand
unsigned Entry = MCOpPredicateMap[Rec];
Expand All @@ -908,39 +905,38 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
Op + ", " + llvm::utostr(Entry) + ")";
}
// for all subcases of ResultOperand::K_Record:
IAP->addCond(Cond);
IAP.addCond(Cond);
break;
}
case CodeGenInstAlias::ResultOperand::K_Imm: {
// Just because the alias has an immediate result, doesn't mean the
// MCInst will. An MCExpr could be present, for example.
IAP->addCond(Op + ".isImm()");
IAP.addCond(Op + ".isImm()");

Cond = Op + ".getImm() == "
+ llvm::utostr(CGA->ResultOperands[i].getImm());
IAP->addCond(Cond);
Cond = Op + ".getImm() == " +
llvm::utostr(CGA.ResultOperands[i].getImm());
IAP.addCond(Cond);
break;
}
case CodeGenInstAlias::ResultOperand::K_Reg:
// If this is zero_reg, something's playing tricks we're not
// equipped to handle.
if (!CGA->ResultOperands[i].getRegister()) {
if (!CGA.ResultOperands[i].getRegister()) {
CantHandle = true;
break;
}

Cond = Op + ".getReg() == " + Target.getName() +
"::" + CGA->ResultOperands[i].getRegister()->getName();
IAP->addCond(Cond);
Cond = Op + ".getReg() == " + Target.getName() + "::" +
CGA.ResultOperands[i].getRegister()->getName();
IAP.addCond(Cond);
break;
}

if (!IAP) break;
MIOpNum += RO.getMINumOperands();
}

if (CantHandle) continue;
IAPrinterMap[Aliases.first].push_back(IAP);
IAPrinterMap[Aliases.first].push_back(std::move(IAP));
}
}

Expand All @@ -959,30 +955,26 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
std::string Cases;
raw_string_ostream CasesO(Cases);

for (std::map<std::string, std::vector<IAPrinter*> >::iterator
I = IAPrinterMap.begin(), E = IAPrinterMap.end(); I != E; ++I) {
std::vector<IAPrinter*> &IAPs = I->second;
for (auto &Entry : IAPrinterMap) {
std::vector<IAPrinter> &IAPs = Entry.second;
std::vector<IAPrinter*> UniqueIAPs;

for (std::vector<IAPrinter*>::iterator
II = IAPs.begin(), IE = IAPs.end(); II != IE; ++II) {
IAPrinter *LHS = *II;
for (auto &LHS : IAPs) {
bool IsDup = false;
for (std::vector<IAPrinter*>::iterator
III = IAPs.begin(), IIE = IAPs.end(); III != IIE; ++III) {
IAPrinter *RHS = *III;
if (LHS != RHS && *LHS == *RHS) {
for (const auto &RHS : IAPs) {
if (&LHS != &RHS && LHS == RHS) {
IsDup = true;
break;
}
}

if (!IsDup) UniqueIAPs.push_back(LHS);
if (!IsDup)
UniqueIAPs.push_back(&LHS);
}

if (UniqueIAPs.empty()) continue;

CasesO.indent(2) << "case " << I->first << ":\n";
CasesO.indent(2) << "case " << Entry.first << ":\n";

for (std::vector<IAPrinter*>::iterator
II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) {
Expand Down Expand Up @@ -1099,14 +1091,6 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
}

O << "#endif // PRINT_ALIAS_INSTR\n";

// Free allocated memory.
for (auto &Aliases : AliasMap)
for (auto &Alias : Aliases.second)
delete Alias.first;
for (auto &P : IAPrinterMap)
for (IAPrinter* IAP : P.second)
delete IAP;
}

AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) {
Expand Down

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