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[PPC64] Fix DQ-form instruction handling and emit error for misalignm…
…ent. Relanding r340564, original commit message: Fixes the handling of *_DS relocations used on DQ-form instructions where we were overwriting some of the extended opcode bits. Also adds an alignment check so that the user will receive a diagnostic error if the value we are writing is not properly aligned. Differential Revision: https://reviews.llvm.org/D51124 llvm-svn: 340832
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Sean Fertile
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Aug 28, 2018
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,32 @@ | ||
# REQUIRES: ppc | ||
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# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o | ||
# RUN: ld.lld %t.o -o %t | ||
# RUN: llvm-objdump -D %t | FileCheck %s | ||
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# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o | ||
# RUN: ld.lld %t.o -o %t | ||
# RUN: llvm-objdump -D %t | FileCheck %s | ||
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.global test | ||
.p2align 4 | ||
.type test,@function | ||
test: | ||
.Lgep: | ||
addis 2, 12, .TOC.-.Lgep@ha | ||
addi 2, 2, .TOC.-.Lgep@l | ||
.Llep: | ||
.localentry test, .Llep-.Lgep | ||
addis 3, 2, qword@toc@ha | ||
lxv 3, qword@toc@l(3) | ||
addis 3, 2, qword@toc@ha | ||
stxv 3, qword@toc@l(3) | ||
blr | ||
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.comm qword, 16, 16 | ||
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# Verify that we don't overwrite any of the extended opcode bits on a DQ form | ||
# instruction. | ||
# CHECK-LABEL: test | ||
# CHECK: lxv 3, -32768(3) | ||
# CHECK: stxv 3, -32768(3) |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,26 @@ | ||
# REQUIRES: ppc | ||
# | ||
# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o | ||
# RUN: not ld.lld %t.o -o %t 2>&1 | FileCheck %s | ||
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# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o | ||
# RUN: not ld.lld %t.o -o %t 2>&1 | FileCheck %s | ||
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# CHECK: improper alignment for relocation R_PPC64_ADDR16_LO_DS: 0x8001 is not aligned to 16 bytes | ||
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.global test | ||
.p2align 4 | ||
.type test,@function | ||
test: | ||
.Lgep: | ||
addis 2, 12, .TOC.-.Lgep@ha | ||
addi 2, 2, .TOC.-.Lgep@l | ||
.Llep: | ||
.localentry test, .Llep-.Lgep | ||
addis 3, 2, qword@toc@ha | ||
lxv 3, qword@toc@l(3) | ||
blr | ||
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.comm pad, 1, 1 | ||
.comm qword, 16, 1 | ||
|
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,26 @@ | ||
# REQUIRES: ppc | ||
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||
# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o | ||
# RUN: not ld.lld %t.o -o %t 2>&1 | FileCheck %s | ||
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# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o | ||
# RUN: not ld.lld %t.o -o %t 2>&1 | FileCheck %s | ||
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# CHECK: improper alignment for relocation R_PPC64_ADDR16_LO_DS: 0x8001 is not aligned to 4 bytes | ||
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.global test | ||
.p2align 4 | ||
.type test,@function | ||
test: | ||
.Lgep: | ||
addis 2, 12, .TOC.-.Lgep@ha | ||
addi 2, 2, .TOC.-.Lgep@l | ||
.Llep: | ||
.localentry test, .Llep-.Lgep | ||
addis 3, 2, word@toc@ha | ||
lwa 3, word@toc@l(3) | ||
blr | ||
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.comm pad, 1, 1 | ||
.comm word, 4, 1 | ||
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