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[XCOFF][AIX] Emit correct alignment for csect
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Summary:
This patch tries to emit the correct alignment result for both
object file generation path and assembly path.

Reviewed by: hubert.reinterpretcast, DiggerLin, daltenty

Differential Revision: https://reviews.llvm.org/D79127
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@jasonliudev
jasonliudev committed May 11, 2020
1 parent 723c46e commit 51e6fc4
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Showing 15 changed files with 136 additions and 43 deletions.
6 changes: 6 additions & 0 deletions llvm/include/llvm/MC/MCSectionXCOFF.h
View file
Expand Up @@ -36,6 +36,7 @@ class MCSectionXCOFF final : public MCSection {
XCOFF::SymbolType Type;
XCOFF::StorageClass StorageClass;
MCSymbolXCOFF *const QualName;
static constexpr unsigned DefaultAlignVal = 4;

MCSectionXCOFF(StringRef Name, XCOFF::StorageMappingClass SMC,
XCOFF::SymbolType ST, XCOFF::StorageClass SC, SectionKind K,
Expand All @@ -47,8 +48,13 @@ class MCSectionXCOFF final : public MCSection {
assert(QualName != nullptr && "QualName is needed.");
QualName->setStorageClass(SC);
QualName->setRepresentedCsect(this);
// A csect is 4 byte aligned by default, except for undefined symbol csects.
if (Type != XCOFF::XTY_ER)
setAlignment(Align(DefaultAlignVal));
}

void printCsectDirective(raw_ostream &OS) const;

public:
~MCSectionXCOFF();

Expand Down
10 changes: 7 additions & 3 deletions llvm/lib/MC/MCSectionXCOFF.cpp
View file
Expand Up @@ -15,6 +15,10 @@ using namespace llvm;

MCSectionXCOFF::~MCSectionXCOFF() = default;

void MCSectionXCOFF::printCsectDirective(raw_ostream &OS) const {
OS << "\t.csect " << QualName->getName() << ", " << Log2_32(getAlignment())
<< '\n';
}

void MCSectionXCOFF::PrintSwitchToSection(const MCAsmInfo &MAI, const Triple &T,
raw_ostream &OS,
Expand All @@ -23,22 +27,22 @@ void MCSectionXCOFF::PrintSwitchToSection(const MCAsmInfo &MAI, const Triple &T,
if (getMappingClass() != XCOFF::XMC_PR)
report_fatal_error("Unhandled storage-mapping class for .text csect");

OS << "\t.csect " << QualName->getName() << '\n';
printCsectDirective(OS);
return;
}

if (getKind().isReadOnly()) {
if (getMappingClass() != XCOFF::XMC_RO)
report_fatal_error("Unhandled storage-mapping class for .rodata csect.");
OS << "\t.csect " << QualName->getName() << '\n';
printCsectDirective(OS);
return;
}

if (getKind().isData()) {
switch (getMappingClass()) {
case XCOFF::XMC_RW:
case XCOFF::XMC_DS:
OS << "\t.csect " << QualName->getName() << '\n';
printCsectDirective(OS);
break;
case XCOFF::XMC_TC:
break;
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6 changes: 6 additions & 0 deletions llvm/lib/MC/MCXCOFFStreamer.cpp
View file
Expand Up @@ -16,6 +16,7 @@
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCDirectives.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCSectionXCOFF.h"
#include "llvm/MC/MCSymbolXCOFF.h"
#include "llvm/Support/TargetRegistry.h"

Expand Down Expand Up @@ -60,6 +61,11 @@ void MCXCOFFStreamer::emitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
XCOFF::C_HIDEXT);
Symbol->setCommon(Size, ByteAlignment);

// Default csect align is 4, but common symbols have explicit alignment values
// and we should honor it.
cast<MCSymbolXCOFF>(Symbol)->getRepresentedCsect()->setAlignment(
Align(ByteAlignment));

// Emit the alignment and storage for the variable to the section.
emitValueToAlignment(ByteAlignment);
emitZeros(Size);
Expand Down
41 changes: 34 additions & 7 deletions llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
View file
Expand Up @@ -159,13 +159,7 @@ class PPCAIXAsmPrinter : public PPCAsmPrinter {

StringRef getPassName() const override { return "AIX PPC Assembly Printer"; }

bool doInitialization(Module &M) override {
if (M.alias_size() > 0u)
report_fatal_error(
"module has aliases, which LLVM does not yet support for AIX");

return PPCAsmPrinter::doInitialization(M);
}
bool doInitialization(Module &M) override;

void SetupMachineFunction(MachineFunction &MF) override;

Expand Down Expand Up @@ -1725,6 +1719,39 @@ void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
}
}

bool PPCAIXAsmPrinter::doInitialization(Module &M) {
if (M.alias_size() > 0u)
report_fatal_error(
"module has aliases, which LLVM does not yet support for AIX");

const bool Result = PPCAsmPrinter::doInitialization(M);

auto setCsectAlignment = [this](const GlobalObject *GO) {
// Declarations have 0 alignment which is set by default.
if (GO->isDeclaration())
return;

SectionKind GOKind = getObjFileLowering().getKindForGlobal(GO, TM);
MCSectionXCOFF *Csect = cast<MCSectionXCOFF>(
getObjFileLowering().SectionForGlobal(GO, GOKind, TM));

Align GOAlign = getGVAlignment(GO, GO->getParent()->getDataLayout());
if (GOAlign > Csect->getAlignment())
Csect->setAlignment(GOAlign);
};

// We need to know, up front, the alignment of csects for the assembly path,
// because once a .csect directive gets emitted, we could not change the
// alignment value on it.
for (const auto &G : M.globals())
setCsectAlignment(&G);

for (const auto &F : M)
setCsectAlignment(&F);

return Result;
}

/// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code
/// for a MachineFunction to the given output stream, in a format that the
/// Darwin assembler can deal with.
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/aix-lower-constant-pool-index.ll
View file
Expand Up @@ -45,7 +45,7 @@ entry:
; 64LARGE-MIR: renamable $x[[REG2:[0-9]+]] = LDtocL %const.0, killed renamable $x[[REG1]], implicit $x2 :: (load 8 from got)
; 64LARGE-MIR: renamable $f[[REG3:[0-9]+]] = LFS 0, killed renamable $x[[REG2]] :: (load 4 from constant-pool)

; 32SMALL-ASM: .csect .rodata[RO]
; 32SMALL-ASM: .csect .rodata[RO], 2
; 32SMALL-ASM: .align 2
; 32SMALL-ASM: .LCPI0_0:
; 32SMALL-ASM: .long 0x40b00000
Expand All @@ -54,7 +54,7 @@ entry:
; 32SMALL-ASM: lfs 1, 0([[REG1]])
; 32SMALL-ASM: blr

; 32LARGE-ASM: .csect .rodata[RO]
; 32LARGE-ASM: .csect .rodata[RO], 2
; 32LARGE-ASM: .align 2
; 32LARGE-ASM: .LCPI0_0:
; 32LARGE-ASM: .long 0x40b00000
Expand All @@ -64,7 +64,7 @@ entry:
; 32LARGE-ASM: lfs 1, 0([[REG2]])
; 32LARGE-ASM: blr

; 64SMALL-ASM: .csect .rodata[RO]
; 64SMALL-ASM: .csect .rodata[RO], 2
; 64SMALL-ASM: .align 2
; 64SMALL-ASM: .LCPI0_0:
; 64SMALL-ASM: .long 0x40b00000
Expand All @@ -73,7 +73,7 @@ entry:
; 64SMALL-ASM: lfs 1, 0([[REG1]])
; 64SMALL-ASM: blr

; 64LARGE-ASM: .csect .rodata[RO]
; 64LARGE-ASM: .csect .rodata[RO], 2
; 64LARGE-ASM: .align 2
; 64LARGE-ASM: .LCPI0_0:
; 64LARGE-ASM: .long 0x40b00000
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll
View file
Expand Up @@ -96,7 +96,7 @@
; 32SMALL-ASM: LBB0_6:
; 32SMALL-ASM: li 3, 0
; 32SMALL-ASM: blr
; 32SMALL-ASM: .csect .rodata[RO]
; 32SMALL-ASM: .csect .rodata[RO], 2
; 32SMALL-ASM: .align 2
; 32SMALL-ASM: .LJTI0_0:
; 32SMALL-ASM: .long LBB0_2-.LJTI0_0
Expand All @@ -123,7 +123,7 @@
; 32LARGE-ASM: LBB0_6:
; 32LARGE-ASM: li 3, 0
; 32LARGE-ASM: blr
; 32LARGE-ASM: .csect .rodata[RO]
; 32LARGE-ASM: .csect .rodata[RO], 2
; 32LARGE-ASM: .align 2
; 32LARGE-ASM: .LJTI0_0:
; 32LARGE-ASM: .long LBB0_2-.LJTI0_0
Expand All @@ -149,7 +149,7 @@
; 64SMALL-ASM: LBB0_6:
; 64SMALL-ASM: li 3, 0
; 64SMALL-ASM: blr
; 64SMALL-ASM: .csect .rodata[RO]
; 64SMALL-ASM: .csect .rodata[RO], 2
; 64SMALL-ASM: .align 2
; 64SMALL-ASM: .LJTI0_0:
; 64SMALL-ASM: .long LBB0_2-.LJTI0_0
Expand All @@ -176,7 +176,7 @@
; 64LARGE-ASM: LBB0_6:
; 64LARGE-ASM: li 3, 0
; 64LARGE-ASM: blr
; 64LARGE-ASM: .csect .rodata[RO]
; 64LARGE-ASM: .csect .rodata[RO], 2
; 64LARGE-ASM: .align 2
; 64LARGE-ASM: .LJTI0_0:
; 64LARGE-ASM: .long LBB0_2-.LJTI0_0
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix-readonly-with-relocation.ll
View file
Expand Up @@ -5,14 +5,14 @@
@b = constant i32* @a

;CHECK: .comm a[RW],4,2
;CHECK-NEXT: .csect .data[RW]
;CHECK-NEXT: .csect .data[RW], 2
;CHECK-NEXT: .globl b
;CHECK-NEXT: .align 2
;CHECK-NEXT: b:
;CHECK-NEXT: .long a

;CHECK64: .comm a[RW],4,2
;CHECK64-NEXT: .csect .data[RW]
;CHECK64-NEXT: .csect .data[RW], 3
;CHECK64-NEXT: .globl b
;CHECK64-NEXT: .align 3
;CHECK64-NEXT: b:
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/aix-reference-func-addr-const.ll
View file
Expand Up @@ -11,7 +11,7 @@ entry:
}


;CHECK: .csect .data[RW]
;CHECK: .csect .data[RW], 2
;CHECK-NEXT: .globl foo_ptr
;CHECK-NEXT: .align 2
;CHECK-NEXT: foo_ptr:
Expand All @@ -22,7 +22,7 @@ entry:
;CHECK-NEXT: .long bar[DS]
;CHECK-NEXT: .extern foo[DS]

;CHECK64: .csect .data[RW]
;CHECK64: .csect .data[RW], 3
;CHECK64-NEXT: .globl foo_ptr
;CHECK64-NEXT: .align 3
;CHECK64-NEXT: foo_ptr:
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
View file
Expand Up @@ -38,10 +38,10 @@

; CHECK-NOT: .toc

; CHECK: .csect .text[PR]
; CHECK: .csect .text[PR], 2
; CHECK-NEXT: .file

; CHECK: .csect .data[RW]
; CHECK: .csect .data[RW], 5
; CHECK-NEXT: .globl ivar
; CHECK-NEXT: .align 2
; CHECK-NEXT: ivar:
Expand Down Expand Up @@ -186,7 +186,7 @@
; SYMS-NEXT: SectionLen: 0
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
; SYMS-NEXT: SymbolAlignmentLog2: 2
; SYMS-NEXT: SymbolType: XTY_SD (0x1)
; SYMS-NEXT: StorageMappingClass: XMC_PR (0x0)
; SYMS-NEXT: StabInfoIndex: 0x0
Expand Down
3 changes: 2 additions & 1 deletion llvm/test/CodeGen/PowerPC/aix-xcoff-lower-comm.ll
View file
Expand Up @@ -13,7 +13,8 @@


; CHECK: .comm common[RW],4,2
; CHECK-NEXT: .csect .data[RW]
; ASM32-NEXT: .csect .data[RW], 2
; ASM64-NEXT: .csect .data[RW], 3
; CHECK-NEXT: .globl pointer
; ASM32-NEXT: .align 2
; ASM64-NEXT: .align 3
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-const.ll
View file
Expand Up @@ -22,7 +22,7 @@ entry:
ret i32 0
}

;CHECK: .csect .rodata[RO]
;CHECK: .csect .rodata[RO], 4
;CHECK-NEXT: .align 4
;CHECK-NEXT: .L__const.main.cnst32:
;CHECK-NEXT: .llong 4611686018427387954
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/PowerPC/aix-xcoff-mergeable-str.ll
View file
Expand Up @@ -25,21 +25,21 @@ entry:
ret i8 %1
}

; CHECK: .csect .rodata.str2.2[RO]
; CHECK: .csect .rodata.str2.2[RO], 2
; CHECK-NEXT: .align 1
; CHECK-NEXT: .Lmagic16:
; CHECK-NEXT: .short 264 # 0x108
; CHECK-NEXT: .short 272 # 0x110
; CHECK-NEXT: .short 213 # 0xd5
; CHECK-NEXT: .short 0 # 0x0
; CHECK-NEXT: .csect .rodata.str4.4[RO]
; CHECK-NEXT: .csect .rodata.str4.4[RO], 2
; CHECK-NEXT: .align 2
; CHECK-NEXT: .Lmagic32:
; CHECK-NEXT: .long 464 # 0x1d0
; CHECK-NEXT: .long 472 # 0x1d8
; CHECK-NEXT: .long 413 # 0x19d
; CHECK-NEXT: .long 0 # 0x0
; CHECK-NEXT: .csect .rodata.str1.1[RO]
; CHECK-NEXT: .csect .rodata.str1.1[RO], 2
; CHECK-NEXT: .LstrA:
; CHECK-NEXT: .byte 104
; CHECK-NEXT: .byte 101
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
View file
Expand Up @@ -20,7 +20,7 @@
@const_chrarray = constant [4 x i8] c"abcd", align 1
@const_dblarr = constant [4 x double] [double 1.000000e+00, double 2.000000e+00, double 3.000000e+00, double 4.000000e+00], align 8

; CHECK: .csect .rodata[RO]
; CHECK: .csect .rodata[RO], 5
; CHECK-NEXT: .globl const_ivar
; CHECK-NEXT: .align 2
; CHECK-NEXT: const_ivar:
Expand Down
27 changes: 15 additions & 12 deletions llvm/test/CodeGen/PowerPC/test_func_desc.ll
View file
Expand Up @@ -29,40 +29,43 @@ entry:

; CHECK: .globl foo[DS]
; CHECK: .globl .foo
; CHECK: .csect foo[DS]
; 32BIT: .long .foo
; 32BIT: .csect foo[DS], 2
; 32BIT-NEXT: .long .foo
; 32BIT-NEXT: .long TOC[TC0]
; 32BIT-NEXT: .long 0
; 64BIT: .llong .foo
; 64BIT: .csect foo[DS], 3
; 64BIT-NEXT: .llong .foo
; 64BIT-NEXT: .llong TOC[TC0]
; 64BIT-NEXT: .llong 0
; CHECK-NEXT: .csect .text[PR]
; CHECK-NEXT: .csect .text[PR], 2
; CHECK-LABEL: .foo:

; CHECK: .globl main[DS]
; CHECK: .globl .main
; CHECK: .csect main[DS]
; 32BIT: .long .main
; 32BIT: .csect main[DS], 2
; 32BIT-NEXT: .long .main
; 32BIT-NEXT: .long TOC[TC0]
; 32BIT-NEXT: .long 0
; 64BIT: .llong .main
; 64BIT: .csect main[DS], 3
; 64BIT-NEXT: .llong .main
; 64BIT-NEXT: .llong TOC[TC0]
; 64BIT-NEXT: .llong 0
; CHECK-NEXT: .csect .text[PR]
; CHECK-NEXT: .csect .text[PR], 2
; CHECK-LABEL: .main:
; CHECK: bl .foo
; CHECK: bl .extern_foo
; CHECK: bl .static_foo

; CHECK: .lglobl .static_foo
; CHECK: .csect static_foo[DS]
; 32BIT: .long .static_foo
; 32BIT: .csect static_foo[DS], 2
; 32BIT-NEXT: .long .static_foo
; 32BIT-NEXT: .long TOC[TC0]
; 32BIT-NEXT: .long 0
; 64BIT: .llong .static_foo
; 64BIT: .csect static_foo[DS], 3
; 64BIT-NEXT: .llong .static_foo
; 64BIT-NEXT: .llong TOC[TC0]
; 64BIT-NEXT: .llong 0
; CHECK-NEXT: .csect .text[PR]
; CHECK-NEXT: .csect .text[PR], 2
; CHECK-LABEL: .static_foo:

; CHECK-NOT: .csect extern_foo
Expand Down

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