[X86] cvtv2f32.ll - replace X32 checks with X86. NFC.

We try to use X32 for gnux32 triples only.

llvm/test/CodeGen/X86/cvtv2f32.ll

@@ -1,26 +1,26 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux-pc -mcpu=corei7 | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-linux-pc -mcpu=corei7 | FileCheck %s --check-prefix=X86
 ; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=corei7 | FileCheck %s --check-prefix=X64
 
 ; uitofp <2 x i32> codegen from buildvector or legalization is different but gives the same results
 ; across the full 0 - 0xFFFFFFFF u32 range.
 
 define <2 x float> @uitofp_2i32_cvt_buildvector(i32 %x, i32 %y, <2 x float> %v) {
-; X32-LABEL: uitofp_2i32_cvt_buildvector:
-; X32:       # %bb.0:
-; X32-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
-; X32-NEXT:    movsd {{.*#+}} xmm2 = mem[0],zero
-; X32-NEXT:    orpd %xmm2, %xmm1
-; X32-NEXT:    subsd %xmm2, %xmm1
-; X32-NEXT:    cvtsd2ss %xmm1, %xmm1
-; X32-NEXT:    movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
-; X32-NEXT:    orpd %xmm2, %xmm3
-; X32-NEXT:    subsd %xmm2, %xmm3
-; X32-NEXT:    xorps %xmm2, %xmm2
-; X32-NEXT:    cvtsd2ss %xmm3, %xmm2
-; X32-NEXT:    insertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
-; X32-NEXT:    mulps %xmm1, %xmm0
-; X32-NEXT:    retl
+; X86-LABEL: uitofp_2i32_cvt_buildvector:
+; X86:       # %bb.0:
+; X86-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X86-NEXT:    movsd {{.*#+}} xmm2 = mem[0],zero
+; X86-NEXT:    orpd %xmm2, %xmm1
+; X86-NEXT:    subsd %xmm2, %xmm1
+; X86-NEXT:    cvtsd2ss %xmm1, %xmm1
+; X86-NEXT:    movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
+; X86-NEXT:    orpd %xmm2, %xmm3
+; X86-NEXT:    subsd %xmm2, %xmm3
+; X86-NEXT:    xorps %xmm2, %xmm2
+; X86-NEXT:    cvtsd2ss %xmm3, %xmm2
+; X86-NEXT:    insertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
+; X86-NEXT:    mulps %xmm1, %xmm0
+; X86-NEXT:    retl
 ;
 ; X64-LABEL: uitofp_2i32_cvt_buildvector:
 ; X64:       # %bb.0:
@@ -40,15 +40,15 @@ define <2 x float> @uitofp_2i32_cvt_buildvector(i32 %x, i32 %y, <2 x float> %v)
 }
 
 define <2 x float> @uitofp_2i32_buildvector_cvt(i32 %x, i32 %y, <2 x float> %v) {
-; X32-LABEL: uitofp_2i32_buildvector_cvt:
-; X32:       # %bb.0:
-; X32-NEXT:    movdqa {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15]
-; X32-NEXT:    pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero
-; X32-NEXT:    por %xmm1, %xmm2
-; X32-NEXT:    subpd %xmm1, %xmm2
-; X32-NEXT:    cvtpd2ps %xmm2, %xmm1
-; X32-NEXT:    mulps %xmm1, %xmm0
-; X32-NEXT:    retl
+; X86-LABEL: uitofp_2i32_buildvector_cvt:
+; X86:       # %bb.0:
+; X86-NEXT:    movdqa {{.*#+}} xmm1 = [4.503599627370496E+15,4.503599627370496E+15]
+; X86-NEXT:    pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero
+; X86-NEXT:    por %xmm1, %xmm2
+; X86-NEXT:    subpd %xmm1, %xmm2
+; X86-NEXT:    cvtpd2ps %xmm2, %xmm1
+; X86-NEXT:    mulps %xmm1, %xmm0
+; X86-NEXT:    retl
 ;
 ; X64-LABEL: uitofp_2i32_buildvector_cvt:
 ; X64:       # %bb.0:
@@ -69,15 +69,15 @@ define <2 x float> @uitofp_2i32_buildvector_cvt(i32 %x, i32 %y, <2 x float> %v)
 }
 
 define <2 x float> @uitofp_2i32_legalized(<2 x i32> %in, <2 x float> %v) {
-; X32-LABEL: uitofp_2i32_legalized:
-; X32:       # %bb.0:
-; X32-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
-; X32-NEXT:    movdqa {{.*#+}} xmm2 = [4.503599627370496E+15,4.503599627370496E+15]
-; X32-NEXT:    por %xmm2, %xmm0
-; X32-NEXT:    subpd %xmm2, %xmm0
-; X32-NEXT:    cvtpd2ps %xmm0, %xmm0
-; X32-NEXT:    mulps %xmm1, %xmm0
-; X32-NEXT:    retl
+; X86-LABEL: uitofp_2i32_legalized:
+; X86:       # %bb.0:
+; X86-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
+; X86-NEXT:    movdqa {{.*#+}} xmm2 = [4.503599627370496E+15,4.503599627370496E+15]
+; X86-NEXT:    por %xmm2, %xmm0
+; X86-NEXT:    subpd %xmm2, %xmm0
+; X86-NEXT:    cvtpd2ps %xmm0, %xmm0
+; X86-NEXT:    mulps %xmm1, %xmm0
+; X86-NEXT:    retl
 ;
 ; X64-LABEL: uitofp_2i32_legalized:
 ; X64:       # %bb.0: