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[AMDGPU] Narrow lshl from 64 to 32 bit if possible
Turn expensive 64 bit shift into 32 bit if shift does not overflow int: shl (ext x) => zext (shl x) Differential Revision: https://reviews.llvm.org/D33367 llvm-svn: 303569
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,45 @@ | ||
; RUN: llc -march=amdgcn < %s | FileCheck %s | ||
|
||
; CHECK-LABEL: {{^}}zext_shl64_to_32: | ||
; CHECK: s_lshl_b32 | ||
; CHECK-NOT: s_lshl_b64 | ||
define amdgpu_kernel void @zext_shl64_to_32(i64 addrspace(1)* nocapture %out, i32 %x) { | ||
%and = and i32 %x, 1073741823 | ||
%ext = zext i32 %and to i64 | ||
%shl = shl i64 %ext, 2 | ||
store i64 %shl, i64 addrspace(1)* %out, align 4 | ||
ret void | ||
} | ||
|
||
; CHECK-LABEL: {{^}}sext_shl64_to_32: | ||
; CHECK: s_lshl_b32 | ||
; CHECK-NOT: s_lshl_b64 | ||
define amdgpu_kernel void @sext_shl64_to_32(i64 addrspace(1)* nocapture %out, i32 %x) { | ||
%and = and i32 %x, 536870911 | ||
%ext = sext i32 %and to i64 | ||
%shl = shl i64 %ext, 2 | ||
store i64 %shl, i64 addrspace(1)* %out, align 4 | ||
ret void | ||
} | ||
|
||
; CHECK-LABEL: {{^}}zext_shl64_overflow: | ||
; CHECK: s_lshl_b64 | ||
; CHECK-NOT: s_lshl_b32 | ||
define amdgpu_kernel void @zext_shl64_overflow(i64 addrspace(1)* nocapture %out, i32 %x) { | ||
%and = and i32 %x, 2147483647 | ||
%ext = zext i32 %and to i64 | ||
%shl = shl i64 %ext, 2 | ||
store i64 %shl, i64 addrspace(1)* %out, align 4 | ||
ret void | ||
} | ||
|
||
; CHECK-LABEL: {{^}}sext_shl64_overflow: | ||
; CHECK: s_lshl_b64 | ||
; CHECK-NOT: s_lshl_b32 | ||
define amdgpu_kernel void @sext_shl64_overflow(i64 addrspace(1)* nocapture %out, i32 %x) { | ||
%and = and i32 %x, 2147483647 | ||
%ext = sext i32 %and to i64 | ||
%shl = shl i64 %ext, 2 | ||
store i64 %shl, i64 addrspace(1)* %out, align 4 | ||
ret void | ||
} |
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