Skip to content

Commit

Permalink
LLVM_FALLTHROUGH => [[fallthrough]]. NFC
Browse files Browse the repository at this point in the history
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D150996
  • Loading branch information
topperc committed May 24, 2023
1 parent 8a8c2b2 commit 6006d43
Show file tree
Hide file tree
Showing 15 changed files with 16 additions and 16 deletions.
2 changes: 1 addition & 1 deletion clang/lib/AST/TemplateBase.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -327,7 +327,7 @@ void TemplateArgument::Profile(llvm::FoldingSetNodeID &ID,

case TemplateExpansion:
ID.AddInteger(TemplateArg.NumExpansions);
LLVM_FALLTHROUGH;
[[fallthrough]];
case Template:
ID.AddPointer(TemplateArg.Name);
break;
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/Basic/SourceManager.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1312,7 +1312,7 @@ LineOffsetMapping LineOffsetMapping::get(llvm::MemoryBufferRef Buffer,
if (*Buf == '\n') {
++Buf;
}
LLVM_FALLTHROUGH;
[[fallthrough]];
case '\n':
LineOffsets.push_back(Buf - Start);
};
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/Sema/SemaChecking.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3792,7 +3792,7 @@ bool Sema::CheckLoongArchBuiltinFunctionCall(const TargetInfo &TI,
return Diag(TheCall->getBeginLoc(),
diag::err_loongarch_builtin_requires_la64)
<< TheCall->getSourceRange();
LLVM_FALLTHROUGH;
[[fallthrough]];
case LoongArch::BI__builtin_loongarch_cacop_w: {
if (BuiltinID == LoongArch::BI__builtin_loongarch_cacop_w &&
!TI.hasFeature("32bit"))
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -511,14 +511,14 @@ ClangExpressionParser::ClangExpressionParser(
break;
case lldb::eLanguageTypeC_plus_plus_20:
lang_opts.CPlusPlus20 = true;
LLVM_FALLTHROUGH;
[[fallthrough]];
case lldb::eLanguageTypeC_plus_plus_17:
// FIXME: add a separate case for CPlusPlus14. Currently folded into C++17
// because C++14 is the default standard for Clang but enabling CPlusPlus14
// expression evaluatino doesn't pass the test-suite cleanly.
lang_opts.CPlusPlus14 = true;
lang_opts.CPlusPlus17 = true;
LLVM_FALLTHROUGH;
[[fallthrough]];
case lldb::eLanguageTypeC_plus_plus:
case lldb::eLanguageTypeC_plus_plus_11:
case lldb::eLanguageTypeC_plus_plus_14:
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Analysis/MemoryLocation.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -257,7 +257,7 @@ MemoryLocation MemoryLocation::getForArgument(const CallBase *Call,

case LibFunc_memset_chk:
assert(ArgIdx == 0 && "Invalid argument index for memset_chk");
LLVM_FALLTHROUGH;
[[fallthrough]];
case LibFunc_memcpy_chk: {
assert((ArgIdx == 0 || ArgIdx == 1) &&
"Invalid argument index for memcpy_chk");
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Analysis/ScalarEvolution.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -15325,7 +15325,7 @@ const SCEV *ScalarEvolution::applyLoopGuards(const SCEV *Expr, const Loop *L) {
if (RHS->getType()->isPointerTy())
return;
RHS = getUMaxExpr(RHS, One);
LLVM_FALLTHROUGH;
[[fallthrough]];
case CmpInst::ICMP_SLT: {
RHS = getMinusSCEV(RHS, One);
RHS = DividesBy ? GetPreviousSCEVDividesByDivisor(RHS, DividesBy) : RHS;
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -443,7 +443,7 @@ Error LVBinaryReader::createInstructions(LVScope *Scope,
break;
case MCDisassembler::SoftFail:
LLVM_DEBUG({ dbgs() << "Potentially undefined instruction:"; });
LLVM_FALLTHROUGH;
[[fallthrough]];
case MCDisassembler::Success: {
std::string Buffer;
raw_string_ostream Stream(Buffer);
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2420,7 +2420,7 @@ OpenMPIRBuilder::InsertPointTy OpenMPIRBuilder::applyWorkshareLoop(
case OMPScheduleType::BaseRuntimeSimd:
assert(!ChunkSize &&
"schedule type does not support user-defined chunk sizes");
LLVM_FALLTHROUGH;
[[fallthrough]];
case OMPScheduleType::BaseDynamicChunked:
case OMPScheduleType::BaseGuidedChunked:
case OMPScheduleType::BaseGuidedIterativeChunked:
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/ProfileData/InstrProf.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1385,7 +1385,7 @@ Expected<Header> Header::readFromBuffer(const unsigned char *Buffer) {
case 10ull:
H.TemporalProfTracesOffset =
read(Buffer, offsetOf(&Header::TemporalProfTracesOffset));
LLVM_FALLTHROUGH;
[[fallthrough]];
case 9ull:
H.BinaryIdOffset = read(Buffer, offsetOf(&Header::BinaryIdOffset));
[[fallthrough]];
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2529,7 +2529,7 @@ InstructionCost AArch64TTIImpl::getArithmeticInstrCost(
return 2 * LT.first;
if (!Ty->getScalarType()->isFP128Ty())
return LT.first;
LLVM_FALLTHROUGH;
[[fallthrough]];
case ISD::FMUL:
case ISD::FDIV:
// These nodes are marked as 'custom' just to lower them to SVE.
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3994,7 +3994,7 @@ bool PPCDAGToDAGISel::tryBitPermutation(SDNode *N) {
if (SRLConst && SRLConst->getSExtValue() == 16)
return false;
}
LLVM_FALLTHROUGH;
[[fallthrough]];
case ISD::ROTL:
case ISD::SHL:
case ISD::AND:
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -10686,7 +10686,7 @@ SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
RetOps.push_back(Extract);
return DAG.getMergeValues(RetOps, dl);
}
LLVM_FALLTHROUGH;
[[fallthrough]];
}
case Intrinsic::ppc_vsx_disassemble_pair: {
int NumVecs = 2;
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/PowerPC/PPCRegisterInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -183,7 +183,7 @@ class PPCRegisterInfo : public PPCGenRegisterInfo {
case 'f':
if (RegName[1] == 'p')
return RegName + 2;
LLVM_FALLTHROUGH;
[[fallthrough]];
case 'r':
case 'v':
if (RegName[1] == 's') {
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,7 @@ bool SPIRVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
switch (Intrinsic) {
case Intrinsic::spv_load:
AlignIdx = 2;
LLVM_FALLTHROUGH;
[[fallthrough]];
case Intrinsic::spv_store: {
if (I.getNumOperands() >= AlignIdx + 1) {
auto *AlignOp = cast<ConstantInt>(I.getOperand(AlignIdx));
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8487,7 +8487,7 @@ VPRecipeBase *VPRecipeBuilder::tryToWiden(Instruction *I,
Ops[1] = SafeRHS;
return new VPWidenRecipe(*I, make_range(Ops.begin(), Ops.end()));
}
LLVM_FALLTHROUGH;
[[fallthrough]];
}
case Instruction::Add:
case Instruction::And:
Expand Down

0 comments on commit 6006d43

Please sign in to comment.