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[AMDGPU] Regenerate test checks (NFC)
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@nikic
nikic committed Mar 10, 2022
1 parent eaac348 commit 611da6b
Showing 1 changed file with 69 additions and 20 deletions.
89 changes: 69 additions & 20 deletions llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-icmp.ll
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@@ -1,17 +1,29 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca < %s | FileCheck %s
; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -amdgpu-promote-alloca -disable-promote-alloca-to-lds< %s | FileCheck -check-prefix=NOLDS %s

; This normally would be fixed by instcombine to be compare to the GEP
; indices

; NOLDS-NOT: addrspace(3)

; CHECK-LABEL: @lds_promoted_alloca_icmp_same_derived_pointer(
; CHECK: [[ARRAYGEP:%[0-9]+]] = getelementptr inbounds [256 x [16 x i32]], [256 x [16 x i32]] addrspace(3)* @lds_promoted_alloca_icmp_same_derived_pointer.alloca, i32 0, i32 %{{[0-9]+}}
; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %a
; CHECK: %ptr1 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %b
; CHECK: %cmp = icmp eq i32 addrspace(3)* %ptr0, %ptr1
define amdgpu_kernel void @lds_promoted_alloca_icmp_same_derived_pointer(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
; CHECK-LABEL: @lds_promoted_alloca_icmp_same_derived_pointer(
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [16 x i32], align 4
; CHECK-NEXT: [[PTR0:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[A:%.*]]
; CHECK-NEXT: [[PTR1:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[B:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[PTR0]], [[PTR1]]
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: store volatile i32 [[ZEXT]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
; NOLDS-LABEL: @lds_promoted_alloca_icmp_same_derived_pointer(
; NOLDS-NEXT: [[ALLOCA:%.*]] = alloca [16 x i32], align 4
; NOLDS-NEXT: [[PTR0:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[A:%.*]]
; NOLDS-NEXT: [[PTR1:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[B:%.*]]
; NOLDS-NEXT: [[CMP:%.*]] = icmp eq i32* [[PTR0]], [[PTR1]]
; NOLDS-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; NOLDS-NEXT: store volatile i32 [[ZEXT]], i32 addrspace(1)* [[OUT:%.*]], align 4
; NOLDS-NEXT: ret void
;
%alloca = alloca [16 x i32], align 4
%ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
%ptr1 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %b
Expand All @@ -21,11 +33,23 @@ define amdgpu_kernel void @lds_promoted_alloca_icmp_same_derived_pointer(i32 add
ret void
}

; CHECK-LABEL: @lds_promoted_alloca_icmp_null_rhs(
; CHECK: [[ARRAYGEP:%[0-9]+]] = getelementptr inbounds [256 x [16 x i32]], [256 x [16 x i32]] addrspace(3)* @lds_promoted_alloca_icmp_null_rhs.alloca, i32 0, i32 %{{[0-9]+}}
; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %a
; CHECK: %cmp = icmp eq i32 addrspace(3)* %ptr0, null
define amdgpu_kernel void @lds_promoted_alloca_icmp_null_rhs(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
; CHECK-LABEL: @lds_promoted_alloca_icmp_null_rhs(
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [16 x i32], align 4
; CHECK-NEXT: [[PTR0:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[A:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[PTR0]], null
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: store volatile i32 [[ZEXT]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
; NOLDS-LABEL: @lds_promoted_alloca_icmp_null_rhs(
; NOLDS-NEXT: [[ALLOCA:%.*]] = alloca [16 x i32], align 4
; NOLDS-NEXT: [[PTR0:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[A:%.*]]
; NOLDS-NEXT: [[CMP:%.*]] = icmp eq i32* [[PTR0]], null
; NOLDS-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; NOLDS-NEXT: store volatile i32 [[ZEXT]], i32 addrspace(1)* [[OUT:%.*]], align 4
; NOLDS-NEXT: ret void
;
%alloca = alloca [16 x i32], align 4
%ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
%cmp = icmp eq i32* %ptr0, null
Expand All @@ -34,11 +58,23 @@ define amdgpu_kernel void @lds_promoted_alloca_icmp_null_rhs(i32 addrspace(1)* %
ret void
}

; CHECK-LABEL: @lds_promoted_alloca_icmp_null_lhs(
; CHECK: [[ARRAYGEP:%[0-9]+]] = getelementptr inbounds [256 x [16 x i32]], [256 x [16 x i32]] addrspace(3)* @lds_promoted_alloca_icmp_null_lhs.alloca, i32 0, i32 %{{[0-9]+}}
; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32] addrspace(3)* [[ARRAYGEP]], i32 0, i32 %a
; CHECK: %cmp = icmp eq i32 addrspace(3)* null, %ptr0
define amdgpu_kernel void @lds_promoted_alloca_icmp_null_lhs(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
; CHECK-LABEL: @lds_promoted_alloca_icmp_null_lhs(
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [16 x i32], align 4
; CHECK-NEXT: [[PTR0:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[A:%.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* null, [[PTR0]]
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: store volatile i32 [[ZEXT]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
; NOLDS-LABEL: @lds_promoted_alloca_icmp_null_lhs(
; NOLDS-NEXT: [[ALLOCA:%.*]] = alloca [16 x i32], align 4
; NOLDS-NEXT: [[PTR0:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[A:%.*]]
; NOLDS-NEXT: [[CMP:%.*]] = icmp eq i32* null, [[PTR0]]
; NOLDS-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; NOLDS-NEXT: store volatile i32 [[ZEXT]], i32 addrspace(1)* [[OUT:%.*]], align 4
; NOLDS-NEXT: ret void
;
%alloca = alloca [16 x i32], align 4
%ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
%cmp = icmp eq i32* null, %ptr0
Expand All @@ -47,12 +83,25 @@ define amdgpu_kernel void @lds_promoted_alloca_icmp_null_lhs(i32 addrspace(1)* %
ret void
}

; CHECK-LABEL: @lds_promoted_alloca_icmp_unknown_ptr(
; CHECK: %alloca = alloca [16 x i32], align 4
; CHECK: %ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
; CHECK: %ptr1 = call i32* @get_unknown_pointer()
; CHECK: %cmp = icmp eq i32* %ptr0, %ptr1
define amdgpu_kernel void @lds_promoted_alloca_icmp_unknown_ptr(i32 addrspace(1)* %out, i32 %a, i32 %b) #0 {
; CHECK-LABEL: @lds_promoted_alloca_icmp_unknown_ptr(
; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [16 x i32], align 4
; CHECK-NEXT: [[PTR0:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[A:%.*]]
; CHECK-NEXT: [[PTR1:%.*]] = call i32* @get_unknown_pointer()
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32* [[PTR0]], [[PTR1]]
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: store volatile i32 [[ZEXT]], i32 addrspace(1)* [[OUT:%.*]], align 4
; CHECK-NEXT: ret void
;
; NOLDS-LABEL: @lds_promoted_alloca_icmp_unknown_ptr(
; NOLDS-NEXT: [[ALLOCA:%.*]] = alloca [16 x i32], align 4
; NOLDS-NEXT: [[PTR0:%.*]] = getelementptr inbounds [16 x i32], [16 x i32]* [[ALLOCA]], i32 0, i32 [[A:%.*]]
; NOLDS-NEXT: [[PTR1:%.*]] = call i32* @get_unknown_pointer()
; NOLDS-NEXT: [[CMP:%.*]] = icmp eq i32* [[PTR0]], [[PTR1]]
; NOLDS-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; NOLDS-NEXT: store volatile i32 [[ZEXT]], i32 addrspace(1)* [[OUT:%.*]], align 4
; NOLDS-NEXT: ret void
;
%alloca = alloca [16 x i32], align 4
%ptr0 = getelementptr inbounds [16 x i32], [16 x i32]* %alloca, i32 0, i32 %a
%ptr1 = call i32* @get_unknown_pointer()
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