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[MC] Use .p2align instead of .align
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For historic reasons, the behavior of .align differs between targets.
Fortunately, there are alternatives, .p2align and .balign, which make the
interpretation of the parameter explicit, and which behave consistently across
targets.

This patch teaches MC to use .p2align instead of .align, so that people reading
code for multiple architectures don't have to remember which way each platform
does its .align directive.

Differential Revision: http://reviews.llvm.org/D16549

llvm-svn: 258750
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Dan Gohman committed Jan 26, 2016
1 parent 4d3b087 commit 61d15ae
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Showing 73 changed files with 235 additions and 238 deletions.
7 changes: 2 additions & 5 deletions llvm/lib/MC/MCAsmStreamer.cpp
View file
Expand Up @@ -807,7 +807,7 @@ void MCAsmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
default:
llvm_unreachable("Invalid size for machine code value!");
case 1:
OS << "\t.align\t";
OS << "\t.p2align\t";
break;
case 2:
OS << ".p2alignw ";
Expand All @@ -819,10 +819,7 @@ void MCAsmStreamer::EmitValueToAlignment(unsigned ByteAlignment, int64_t Value,
llvm_unreachable("Unsupported alignment size!");
}

if (MAI->getAlignmentIsInBytes())
OS << ByteAlignment;
else
OS << Log2_32(ByteAlignment);
OS << Log2_32(ByteAlignment);

if (Value || MaxBytesToEmit) {
OS << ", 0x";
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll
View file
Expand Up @@ -4,7 +4,7 @@
; getting both the endianness wrong and the element indexing wrong.
define <8 x i16> @foo(<8 x i16> %a) nounwind readnone {
; CHECK: .section __TEXT,__literal16,16byte_literals
; CHECK: .align 4
; CHECK: .p2align 4
; CHECK:lCPI0_0:
; CHECK: .byte 0 ; 0x0
; CHECK: .byte 1 ; 0x1
Expand All @@ -24,7 +24,7 @@ define <8 x i16> @foo(<8 x i16> %a) nounwind readnone {
; CHECK: .byte 9 ; 0x9
; CHECK: .section __TEXT,__text,regular,pure_instructions
; CHECK: .globl _foo
; CHECK: .align 2
; CHECK: .p2align 2
; CHECK:_foo: ; @foo
; CHECK: adrp [[BASE:x[0-9]+]], lCPI0_0@PAGE
; CHECK: ldr q[[REG:[0-9]+]], {{\[}}[[BASE]], lCPI0_0@PAGEOFF]
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll
View file
Expand Up @@ -40,7 +40,7 @@ define i32 @test_emulated_init() {

; EMU-NOT: __emutls_v.general_dynamic_var:

; EMU: .align 3
; EMU: .p2align 3
; EMU-LABEL: __emutls_v.emulated_init_var:
; EMU-NEXT: .xword 4
; EMU-NEXT: .xword 8
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6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AArch64/emutls.ll
View file
Expand Up @@ -189,7 +189,7 @@ entry:

; ARM64: .section .data.__emutls_v._ZN1AIiE1xE,{{.*}},__emutls_v._ZN1AIiE1xE,comdat
; ARM64: .weak __emutls_v._ZN1AIiE1xE
; ARM64: .align 3
; ARM64: .p2align 3
; ARM64-LABEL: __emutls_v._ZN1AIiE1xE:
; ARM64-NEXT: .xword 4
; ARM64-NEXT: .xword 4
Expand All @@ -198,7 +198,7 @@ entry:

; ARM64: .section .data.__emutls_v._ZN1AIfE1xE,{{.*}},__emutls_v._ZN1AIfE1xE,comdat
; ARM64: .weak __emutls_v._ZN1AIfE1xE
; ARM64: .align 3
; ARM64: .p2align 3
; ARM64-LABEL: __emutls_v._ZN1AIfE1xE:
; ARM64-NEXT: .xword 4
; ARM64-NEXT: .xword 4
Expand All @@ -207,7 +207,7 @@ entry:

; ARM64: .section .rodata.__emutls_t._ZN1AIfE1xE,{{.*}},__emutls_t._ZN1AIfE1xE,comdat
; ARM64: .weak __emutls_t._ZN1AIfE1xE
; ARM64: .align 2
; ARM64: .p2align 2
; ARM64-LABEL: __emutls_t._ZN1AIfE1xE:
; ARM64-NEXT: .word 0
; ARM64-NEXT: .size
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/emutls_generic.ll
View file
Expand Up @@ -39,7 +39,7 @@ entry:
; ARM_64-NOT: __emutls_v.external_x:
; ARM_64: .data{{$}}
; ARM_64: .globl __emutls_v.external_y
; ARM_64: .align 3
; ARM_64: .p2align 3
; ARM_64-LABEL: __emutls_v.external_y:
; ARM_64-NEXT: .xword 1
; ARM_64-NEXT: .xword 2
Expand All @@ -51,7 +51,7 @@ entry:
; ARM_64-NEXT: .byte 7
; ARM_64: .data{{$}}
; ARM_64-NOT: .globl __emutls_v
; ARM_64: .align 3
; ARM_64: .p2align 3
; ARM_64-LABEL: __emutls_v.internal_y:
; ARM_64-NEXT: .xword 8
; ARM_64-NEXT: .xword 16
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/global-merge-3.ll
View file
Expand Up @@ -21,15 +21,15 @@ define void @f1(i32 %a1, i32 %a2, i32 %a3) {
}

;CHECK: .type .L_MergedGlobals,@object // @_MergedGlobals
;CHECK: .align 4
;CHECK: .p2align 4
;CHECK: .L_MergedGlobals:
;CHECK: .size .L_MergedGlobals, 4004

;CHECK: .type .L_MergedGlobals.1,@object // @_MergedGlobals.1
;CHECK: .local .L_MergedGlobals.1
;CHECK: .comm .L_MergedGlobals.1,4000,16

;CHECK-APPLE-IOS: .align 4
;CHECK-APPLE-IOS: .p2align 4
;CHECK-APPLE-IOS: l__MergedGlobals:
;CHECK-APPLE-IOS: .long 1
;CHECK-APPLE-IOS: .space 4000
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/stackmap-liveness.ll
View file
Expand Up @@ -37,7 +37,7 @@ define i64 @stackmap_liveness(i1 %c) {
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .byte 8
; Align
; CHECK-NEXT: .align 3
; CHECK-NEXT: .p2align 3
%1 = select i1 %c, i64 1, i64 2
call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 32, i8* null, i32 0)
ret i64 %1
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AMDGPU/elf.ll
View file
Expand Up @@ -22,7 +22,7 @@
; CONFIG-NEXT: .long 45096
; TYPICAL-NEXT: .long 0
; TONGA-NEXT: .long 576
; CONFIG: .align 256
; CONFIG: .p2align 8
; CONFIG: test:
define void @test(i32 %p) #0 {
%i = add i32 %p, 2
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/Windows/long-calls.ll
View file
Expand Up @@ -12,7 +12,7 @@ entry:
; CHECK-LABEL: caller
; CHECK: ldr [[REG:r[0-9]+]], [[CPI:LCPI[_0-9]+]]
; CHECK: bx [[REG]]
; CHECK: .align 2
; CHECK: .p2align 2
; CHECK: [[CPI]]:
; CHECK: .long callee

20 changes: 10 additions & 10 deletions llvm/test/CodeGen/ARM/align.ll
View file
Expand Up @@ -8,33 +8,33 @@
; no alignment

@c = global i16 2
;ELF: .align 1
;ELF: .p2align 1
;ELF: c:
;DARWIN: .align 1
;DARWIN: .p2align 1
;DARWIN: _c:

@d = global i32 3
;ELF: .align 2
;ELF: .p2align 2
;ELF: d:
;DARWIN: .align 2
;DARWIN: .p2align 2
;DARWIN: _d:

@e = global i64 4
;ELF: .align 3
;ELF: .p2align 3
;ELF: e
;DARWIN: .align 3
;DARWIN: .p2align 3
;DARWIN: _e:

@f = global float 5.0
;ELF: .align 2
;ELF: .p2align 2
;ELF: f:
;DARWIN: .align 2
;DARWIN: .p2align 2
;DARWIN: _f:

@g = global double 6.0
;ELF: .align 3
;ELF: .p2align 3
;ELF: g:
;DARWIN: .align 3
;DARWIN: .p2align 3
;DARWIN: _g:

@bar = common global [75 x i8] zeroinitializer, align 128
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/byval_load_align.ll
View file
Expand Up @@ -7,7 +7,7 @@
; CHECK: ldr r2, [r[[REG]], #4]
; CHECK: ldr r3, [r[[REG]], #8]
; CHECK-NOT: ldm
; CHECK: .align 1 @ @sID
; CHECK: .p2align 1 @ @sID

%struct.ModuleID = type { [32 x i8], [32 x i8], i16 }

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/ARM/ehabi-handlerdata-nounwind.ll
View file
Expand Up @@ -42,7 +42,7 @@ try.cont:
}

; CHECK: .globl test1
; CHECK: .align 2
; CHECK: .p2align 2
; CHECK: .type test1,%function
; CHECK-LABEL: test1:
; CHECK: .fnstart
Expand All @@ -51,7 +51,7 @@ try.cont:

; CHECK: .personality __gxx_personality_v0
; CHECK: .handlerdata
; CHECK: .align 2
; CHECK: .p2align 2
; CHECK-LABEL: GCC_except_table0:
; CHECK-LABEL: .Lexception0:
; CHECK: .byte 255 @ @LPStart Encoding = omit
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/ARM/ehabi-handlerdata.ll
View file
Expand Up @@ -40,13 +40,13 @@ try.cont:
}

; CHECK: .globl test1
; CHECK: .align 2
; CHECK: .p2align 2
; CHECK: .type test1,%function
; CHECK-LABEL: test1:
; CHECK: .fnstart
; CHECK: .personality __gxx_personality_v0
; CHECK: .handlerdata
; CHECK: .align 2
; CHECK: .p2align 2
; CHECK-LABEL: GCC_except_table0:
; CHECK-LABEL: .Lexception0:
; CHECK: .byte 255 @ @LPStart Encoding = omit
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/ARM/emutls_generic.ll
View file
Expand Up @@ -41,7 +41,7 @@ entry:
; ARM_32-NOT: __emutls_v.external_x:
; ARM_32: .data{{$}}
; ARM_32: .globl __emutls_v.external_y
; ARM_32: .align 2
; ARM_32: .p2align 2
; ARM_32-LABEL: __emutls_v.external_y:
; ARM_32-NEXT: .long 1
; ARM_32-NEXT: .long 2
Expand All @@ -52,7 +52,7 @@ entry:
; ARM_32-NEXT: .byte 7
; ARM_32: .data{{$}}
; ARM_32-NOT: .globl
; ARM_32: .align 2
; ARM_32: .p2align 2
; ARM_32-LABEL: __emutls_v.internal_y:
; ARM_32-NEXT: .long 8
; ARM_32-NEXT: .long 16
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/ARM/globals.ll
View file
Expand Up @@ -15,7 +15,7 @@ define i32 @test1() {
; DarwinStatic: ldr r0, [r0]
; DarwinStatic: bx lr

; DarwinStatic: .align 2
; DarwinStatic: .p2align 2
; DarwinStatic: LCPI0_0:
; DarwinStatic: .long {{_G$}}

Expand All @@ -26,12 +26,12 @@ define i32 @test1() {
; DarwinDynamic: ldr r0, [r0]
; DarwinDynamic: bx lr

; DarwinDynamic: .align 2
; DarwinDynamic: .p2align 2
; DarwinDynamic: LCPI0_0:
; DarwinDynamic: .long L_G$non_lazy_ptr

; DarwinDynamic: .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers
; DarwinDynamic: .align 2
; DarwinDynamic: .p2align 2
; DarwinDynamic: L_G$non_lazy_ptr:
; DarwinDynamic: .indirect_symbol _G
; DarwinDynamic: .long 0
Expand All @@ -46,12 +46,12 @@ define i32 @test1() {
; DarwinPIC-NOT: ldr
; DarwinPIC: bx lr

; DarwinPIC: .align 2
; DarwinPIC: .p2align 2
; DarwinPIC: LCPI0_0:
; DarwinPIC: .long L_G$non_lazy_ptr-(LPC0_0+8)

; DarwinPIC: .section __DATA,__nl_symbol_ptr,non_lazy_symbol_pointers
; DarwinPIC: .align 2
; DarwinPIC: .p2align 2
; DarwinPIC: L_G$non_lazy_ptr:
; DarwinPIC: .indirect_symbol _G
; DarwinPIC: .long 0
Expand All @@ -66,7 +66,7 @@ define i32 @test1() {
; LinuxPIC: ldr r0, [r0]
; LinuxPIC: bx lr

; LinuxPIC: .align 2
; LinuxPIC: .p2align 2
; LinuxPIC: .LCPI0_0:
; LinuxPIC: .Ltmp0:
; LinuxPIC: .long G(GOT_PREL)-((.LPC0_0+8)-.Ltmp0)
18 changes: 9 additions & 9 deletions llvm/test/CodeGen/ARM/memfunc.ll
View file
Expand Up @@ -398,22 +398,22 @@ entry:
}

; CHECK: {{\.data|\.section.+data}}
; CHECK-NOT: .align
; CHECK-NOT: .p2align
; CHECK: arr1:
; CHECK-IOS: .align 3
; CHECK-DARWIN: .align 2
; CHECK-EABI-NOT: .align
; CHECK-GNUEABI-NOT: .align
; CHECK-IOS: .p2align 3
; CHECK-DARWIN: .p2align 2
; CHECK-EABI-NOT: .p2align
; CHECK-GNUEABI-NOT: .p2align
; CHECK: arr2:
; CHECK: {{\.section.+foo,bar}}
; CHECK-NOT: .align
; CHECK-NOT: .p2align
; CHECK: arr3:
; CHECK-NOT: .align
; CHECK-NOT: .p2align
; CHECK: arr4:
; CHECK: {{\.data|\.section.+data}}
; CHECK-NOT: .align
; CHECK-NOT: .p2align
; CHECK: arr5:
; CHECK-NOT: .align
; CHECK-NOT: .p2align
; CHECK: arr6:
; CHECK-NOT: arr7:

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/ARM/preferred-align.ll
View file
Expand Up @@ -3,19 +3,19 @@
@var_agg = global {i8, i8} zeroinitializer

; CHECK: .globl var_agg
; CHECK-NEXT: .align 2
; CHECK-NEXT: .p2align 2

@var1 = global i1 zeroinitializer

; CHECK: .globl var1
; CHECK-NOT: .align
; CHECK-NOT: .p2align

@var8 = global i8 zeroinitializer

; CHECK: .globl var8
; CHECK-NOT: .align
; CHECK-NOT: .p2align

@var16 = global i16 zeroinitializer

; CHECK: .globl var16
; CHECK-NEXT: .align 1
; CHECK-NEXT: .p2align 1
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/ARM/thumb-alignment.ll
View file
Expand Up @@ -3,13 +3,13 @@
@x = external global i32

; CHECK: .globl foo
; CHECK-NEXT: .align 2
; CHECK-NEXT: .p2align 2
define i32* @foo() {
ret i32* @x
}

; CHECK: .globl bar
; CHECK-NEXT: .align 1
; CHECK-NEXT: .p2align 1
define i32* @bar() {
ret i32* zeroinitializer
}
Expand All @@ -22,7 +22,7 @@ define i32* @bar() {
; Create a Thumb-2 jump table, which should force alignment to 4 bytes.

; CHECK: .globl baz
; CHECK-NEXT: .align 2
; CHECK-NEXT: .p2align 2
; CHECK: tbb
define i32 @baz() {
%1 = load i32, i32* @c, align 4
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/ARM/tls-models.ll
View file
Expand Up @@ -130,7 +130,7 @@ entry:

; EMU-NOT: __emutls_t.external_gd
; EMU-NOT: __emutls_v.external_gd
; EMU: .align 2
; EMU: .p2align 2
; EMU-LABEL: __emutls_v.internal_gd:
; EMU-NEXT: .long 4
; EMU-NEXT: .long 4
Expand All @@ -144,7 +144,7 @@ entry:

; EMU-NOT: __emutls_t.external_gd
; EMU-NOT: __emutls_v.external_gd
; EMU: .align 2
; EMU: .p2align 2
; EMU-LABEL: __emutls_v.internal_le:
; EMU-NEXT: .long 4
; EMU-NEXT: .long 4
Expand Down

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