[DPWBS-1120] feat(InstPrinter): pass subtarget to instruction printer

This is in preparation for named CSFR operands support
llvm · Feb 6, 2020 · 63783c1 · 63783c1
1 parent 5102542
commit 63783c1
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Showing 3 changed files with 11 additions and 4 deletions.
diff --git a/llvm/lib/Target/TriCore/InstPrinter/TriCoreInstPrinter.cpp b/llvm/lib/Target/TriCore/InstPrinter/TriCoreInstPrinter.cpp
@@ -31,7 +31,7 @@ using namespace llvm;
 void TriCoreInstPrinter::printInst(const MCInst *MI, uint64_t Address,
                                    StringRef Annot, const MCSubtargetInfo &STI,
                                    raw_ostream &O) {
-  printInstruction(MI, Address, O);
+  printInstruction(MI, Address, STI, O);
   printAnnotation(O, Annot);
 }
 
@@ -40,6 +40,7 @@ void TriCoreInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
 }
 
 void TriCoreInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
+                                      const MCSubtargetInfo &STI,
                                       raw_ostream &O, const char *Modifier) {
   assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
   const MCOperand &MO = MI->getOperand(OpNo);

diff --git a/llvm/lib/Target/TriCore/InstPrinter/TriCoreInstPrinter.h b/llvm/lib/Target/TriCore/InstPrinter/TriCoreInstPrinter.h
@@ -30,11 +30,12 @@ class TriCoreInstPrinter : public MCInstPrinter {
                  const MCSubtargetInfo &STI, raw_ostream &O) override;
   void printRegName(raw_ostream &O, unsigned RegNo) const override;
 
-  void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
-                    const char *Modifier = nullptr);
+  void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
+                    raw_ostream &O, const char *Modifier = nullptr);
 
   // Autogenerated by tblgen.
-  void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
+  void printInstruction(const MCInst *MI, uint64_t Address,
+                        const MCSubtargetInfo &STI, raw_ostream &O);
 
   static const char *getRegisterName(unsigned RegNo);
 };

diff --git a/llvm/lib/Target/TriCore/TriCore.td b/llvm/lib/Target/TriCore/TriCore.td
@@ -72,7 +72,12 @@ def : Processor<"tc4xx", NoItineraries,
 // Target Declaration
 //===----------------------------------------------------------------------===//
 
+def TriCoreAsmWriter : AsmWriter {
+  let PassSubtarget = 1;
+}
+
 def TriCore : Target {
   let InstructionSet = TriCoreInstrInfo;
   let AssemblyParsers = [TriCoreAsmParser];
+  let AssemblyWriters = [TriCoreAsmWriter];
 }