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[tablegen] Improve performance on *GenRegisterInfo.inc by replacing S…
…parseVector with BitVector. NFC Summary: Generating X86GenRegisterInfo.inc and AArch64GenRegisterInfo.inc is 8-9% faster on my build. Reviewers: bogner, javed.absar Reviewed By: bogner Subscribers: llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D47907 llvm-svn: 334337
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