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[LLDB][RISCV] Add RVD instruction support for EmulateInstructionRISCV
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RVD extension is a double-precision floating-point instruction-set extension, which adds double-precision floating-point computational instructions compliant with the IEEE 754-2008 arithmetic standard.

This patch:
- Reuse most of the functions in the "F extension" to impl the"D extension"
- corresponding unittests.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D140032
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@SEmmmer
SEmmmer committed Dec 15, 2022
1 parent 38f1abe commit 6493fc4
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