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[GlobalISel] Look through truncs and extends in narrowScalarShift
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If a G_SHL is fed by a G_CONSTANT, the lower and upper bits of the source can be
shifted individually by the constant shift amount.

However in case the shift amount came from a G_TRUNC(G_CONSTANT), the generic shift legalization
code was used, producing intermediate shifts that are potentially illegal on some targets.

This change teaches narrowScalarShift to look through G_TRUNCs and G_*EXTs.

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D89100
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@konstantinschwarz
konstantinschwarz committed Aug 10, 2021
1 parent 391456f commit 64bef13
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8 changes: 4 additions & 4 deletions llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
View file
Expand Up @@ -4877,10 +4877,10 @@ LegalizerHelper::narrowScalarShift(MachineInstr &MI, unsigned TypeIdx,
const LLT HalfTy = LLT::scalar(NewBitSize);
const LLT CondTy = LLT::scalar(1);

if (const MachineInstr *KShiftAmt =
getOpcodeDef(TargetOpcode::G_CONSTANT, Amt, MRI)) {
return narrowScalarShiftByConstant(
MI, KShiftAmt->getOperand(1).getCImm()->getValue(), HalfTy, ShiftAmtTy);
if (auto VRegAndVal =
getConstantVRegValWithLookThrough(Amt, MRI, true, false)) {
return narrowScalarShiftByConstant(MI, VRegAndVal->Value, HalfTy,
ShiftAmtTy);
}

// TODO: Expand with known bits.
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108 changes: 28 additions & 80 deletions llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
View file
Expand Up @@ -373,112 +373,60 @@ define void @atomic_load_relaxed(i64, i64, i128* %p, i128* %p2) {
;
; CHECK-LLSC-O0-LABEL: atomic_load_relaxed:
; CHECK-LLSC-O0: // %bb.0:
; CHECK-LLSC-O0-NEXT: sub sp, sp, #64
; CHECK-LLSC-O0-NEXT: .cfi_def_cfa_offset 64
; CHECK-LLSC-O0-NEXT: str x2, [sp, #48] // 8-byte Folded Spill
; CHECK-LLSC-O0-NEXT: str x3, [sp, #56] // 8-byte Folded Spill
; CHECK-LLSC-O0-NEXT: sub sp, sp, #48
; CHECK-LLSC-O0-NEXT: .cfi_def_cfa_offset 48
; CHECK-LLSC-O0-NEXT: str x2, [sp, #32] // 8-byte Folded Spill
; CHECK-LLSC-O0-NEXT: str x3, [sp, #40] // 8-byte Folded Spill
; CHECK-LLSC-O0-NEXT: b .LBB4_1
; CHECK-LLSC-O0-NEXT: .LBB4_1: // %atomicrmw.start
; CHECK-LLSC-O0-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-LLSC-O0-NEXT: ldr x11, [sp, #48] // 8-byte Folded Reload
; CHECK-LLSC-O0-NEXT: ldxp x9, x15, [x11]
; CHECK-LLSC-O0-NEXT: mov x12, xzr
; CHECK-LLSC-O0-NEXT: mov w8, #64
; CHECK-LLSC-O0-NEXT: // kill: def $x8 killed $w8
; CHECK-LLSC-O0-NEXT: mov w10, #64
; CHECK-LLSC-O0-NEXT: // kill: def $x10 killed $w10
; CHECK-LLSC-O0-NEXT: str x10, [sp, #8] // 8-byte Folded Spill
; CHECK-LLSC-O0-NEXT: subs x16, x10, #64
; CHECK-LLSC-O0-NEXT: subs x13, x8, #64
; CHECK-LLSC-O0-NEXT: lsl x14, x15, x10
; CHECK-LLSC-O0-NEXT: lsr x13, x15, x13
; CHECK-LLSC-O0-NEXT: orr x13, x13, x12
; CHECK-LLSC-O0-NEXT: lsl x15, x15, x16
; CHECK-LLSC-O0-NEXT: subs x16, x10, #64
; CHECK-LLSC-O0-NEXT: csel x14, x14, x12, lo
; CHECK-LLSC-O0-NEXT: subs x16, x10, #64
; CHECK-LLSC-O0-NEXT: csel x13, x13, x15, lo
; CHECK-LLSC-O0-NEXT: subs x15, x10, #0
; CHECK-LLSC-O0-NEXT: csel x13, x12, x13, eq
; CHECK-LLSC-O0-NEXT: orr x9, x9, x14
; CHECK-LLSC-O0-NEXT: orr x12, x12, x13
; CHECK-LLSC-O0-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
; CHECK-LLSC-O0-NEXT: ldxp x9, x10, [x11]
; CHECK-LLSC-O0-NEXT: mov x8, xzr
; CHECK-LLSC-O0-NEXT: orr x9, x9, x8
; CHECK-LLSC-O0-NEXT: orr x10, x8, x10
; CHECK-LLSC-O0-NEXT: // implicit-def: $q0
; CHECK-LLSC-O0-NEXT: mov v0.d[0], x9
; CHECK-LLSC-O0-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-LLSC-O0-NEXT: mov v0.d[1], x10
; CHECK-LLSC-O0-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-LLSC-O0-NEXT: mov v0.d[1], x12
; CHECK-LLSC-O0-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
; CHECK-LLSC-O0-NEXT: subs x13, x10, #64
; CHECK-LLSC-O0-NEXT: subs x8, x8, #64
; CHECK-LLSC-O0-NEXT: lsl x8, x12, x8
; CHECK-LLSC-O0-NEXT: orr x8, x8, x9, lsr #0
; CHECK-LLSC-O0-NEXT: lsr x12, x12, x13
; CHECK-LLSC-O0-NEXT: subs x13, x10, #64
; CHECK-LLSC-O0-NEXT: csel x8, x8, x12, lo
; CHECK-LLSC-O0-NEXT: subs x10, x10, #0
; CHECK-LLSC-O0-NEXT: csel x10, x9, x8, eq
; CHECK-LLSC-O0-NEXT: stxp w8, x9, x10, [x11]
; CHECK-LLSC-O0-NEXT: cbnz w8, .LBB4_1
; CHECK-LLSC-O0-NEXT: b .LBB4_2
; CHECK-LLSC-O0-NEXT: .LBB4_2: // %atomicrmw.end
; CHECK-LLSC-O0-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
; CHECK-LLSC-O0-NEXT: ldr x8, [sp, #56] // 8-byte Folded Reload
; CHECK-LLSC-O0-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
; CHECK-LLSC-O0-NEXT: ldr x8, [sp, #40] // 8-byte Folded Reload
; CHECK-LLSC-O0-NEXT: str q0, [x8]
; CHECK-LLSC-O0-NEXT: add sp, sp, #64
; CHECK-LLSC-O0-NEXT: add sp, sp, #48
; CHECK-LLSC-O0-NEXT: ret
;
; CHECK-CAS-O0-LABEL: atomic_load_relaxed:
; CHECK-CAS-O0: // %bb.0:
; CHECK-CAS-O0-NEXT: sub sp, sp, #64
; CHECK-CAS-O0-NEXT: .cfi_def_cfa_offset 64
; CHECK-CAS-O0-NEXT: str x2, [sp, #48] // 8-byte Folded Spill
; CHECK-CAS-O0-NEXT: str x3, [sp, #56] // 8-byte Folded Spill
; CHECK-CAS-O0-NEXT: sub sp, sp, #48
; CHECK-CAS-O0-NEXT: .cfi_def_cfa_offset 48
; CHECK-CAS-O0-NEXT: str x2, [sp, #32] // 8-byte Folded Spill
; CHECK-CAS-O0-NEXT: str x3, [sp, #40] // 8-byte Folded Spill
; CHECK-CAS-O0-NEXT: b .LBB4_1
; CHECK-CAS-O0-NEXT: .LBB4_1: // %atomicrmw.start
; CHECK-CAS-O0-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-CAS-O0-NEXT: ldr x11, [sp, #48] // 8-byte Folded Reload
; CHECK-CAS-O0-NEXT: ldxp x9, x15, [x11]
; CHECK-CAS-O0-NEXT: mov x12, #0
; CHECK-CAS-O0-NEXT: mov w8, #64
; CHECK-CAS-O0-NEXT: // kill: def $x8 killed $w8
; CHECK-CAS-O0-NEXT: mov w10, #64
; CHECK-CAS-O0-NEXT: // kill: def $x10 killed $w10
; CHECK-CAS-O0-NEXT: str x10, [sp, #8] // 8-byte Folded Spill
; CHECK-CAS-O0-NEXT: subs x16, x10, #64
; CHECK-CAS-O0-NEXT: subs x13, x8, #64
; CHECK-CAS-O0-NEXT: lsl x14, x15, x10
; CHECK-CAS-O0-NEXT: lsr x13, x15, x13
; CHECK-CAS-O0-NEXT: orr x13, x13, x12
; CHECK-CAS-O0-NEXT: lsl x15, x15, x16
; CHECK-CAS-O0-NEXT: subs x16, x10, #64
; CHECK-CAS-O0-NEXT: csel x14, x14, x12, lo
; CHECK-CAS-O0-NEXT: subs x16, x10, #64
; CHECK-CAS-O0-NEXT: csel x13, x13, x15, lo
; CHECK-CAS-O0-NEXT: subs x15, x10, #0
; CHECK-CAS-O0-NEXT: csel x13, x12, x13, eq
; CHECK-CAS-O0-NEXT: orr x9, x9, x14
; CHECK-CAS-O0-NEXT: orr x12, x12, x13
; CHECK-CAS-O0-NEXT: ldr x11, [sp, #32] // 8-byte Folded Reload
; CHECK-CAS-O0-NEXT: ldxp x9, x10, [x11]
; CHECK-CAS-O0-NEXT: mov x8, #0
; CHECK-CAS-O0-NEXT: orr x9, x9, x8
; CHECK-CAS-O0-NEXT: orr x10, x8, x10
; CHECK-CAS-O0-NEXT: // implicit-def: $q0
; CHECK-CAS-O0-NEXT: mov v0.d[0], x9
; CHECK-CAS-O0-NEXT: str q0, [sp] // 16-byte Folded Spill
; CHECK-CAS-O0-NEXT: mov v0.d[1], x10
; CHECK-CAS-O0-NEXT: str q0, [sp, #16] // 16-byte Folded Spill
; CHECK-CAS-O0-NEXT: mov v0.d[1], x12
; CHECK-CAS-O0-NEXT: str q0, [sp, #32] // 16-byte Folded Spill
; CHECK-CAS-O0-NEXT: subs x13, x10, #64
; CHECK-CAS-O0-NEXT: subs x8, x8, #64
; CHECK-CAS-O0-NEXT: lsl x8, x12, x8
; CHECK-CAS-O0-NEXT: orr x8, x8, x9, lsr #0
; CHECK-CAS-O0-NEXT: lsr x12, x12, x13
; CHECK-CAS-O0-NEXT: subs x13, x10, #64
; CHECK-CAS-O0-NEXT: csel x8, x8, x12, lo
; CHECK-CAS-O0-NEXT: subs x10, x10, #0
; CHECK-CAS-O0-NEXT: csel x10, x9, x8, eq
; CHECK-CAS-O0-NEXT: stxp w8, x9, x10, [x11]
; CHECK-CAS-O0-NEXT: cbnz w8, .LBB4_1
; CHECK-CAS-O0-NEXT: b .LBB4_2
; CHECK-CAS-O0-NEXT: .LBB4_2: // %atomicrmw.end
; CHECK-CAS-O0-NEXT: ldr q0, [sp, #32] // 16-byte Folded Reload
; CHECK-CAS-O0-NEXT: ldr x8, [sp, #56] // 8-byte Folded Reload
; CHECK-CAS-O0-NEXT: ldr q0, [sp, #16] // 16-byte Folded Reload
; CHECK-CAS-O0-NEXT: ldr x8, [sp, #40] // 8-byte Folded Reload
; CHECK-CAS-O0-NEXT: str q0, [x8]
; CHECK-CAS-O0-NEXT: add sp, sp, #64
; CHECK-CAS-O0-NEXT: add sp, sp, #48
; CHECK-CAS-O0-NEXT: ret

%r = load atomic i128, i128* %p monotonic, align 16
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89 changes: 20 additions & 69 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
View file
Expand Up @@ -44,87 +44,38 @@ body: |
; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD1]](s32), [[DEF]](s32)
; CHECK: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C3]], [[C4]]
; CHECK: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C4]], [[C3]]
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[C3]](s64), [[C4]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[C3]](s64), [[C]]
; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP1]](s32)
; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[MV]], [[C3]](s64)
; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[MV]], [[SUB1]](s64)
; CHECK: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[DEF1]], [[C3]](s64)
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL1]]
; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[MV]], [[SUB]](s64)
; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[SHL]], [[C]]
; CHECK: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[OR]], [[SHL2]]
; CHECK: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC1]](s1), [[DEF1]], [[SELECT1]]
; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SELECT]], [[ZEXTLOAD]]
; CHECK: [[OR2:%[0-9]+]]:_(s64) = G_OR [[SELECT2]], [[C]]
; CHECK: [[SUB2:%[0-9]+]]:_(s64) = G_SUB [[C4]], [[C4]]
; CHECK: [[SUB3:%[0-9]+]]:_(s64) = G_SUB [[C4]], [[C4]]
; CHECK: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[C4]](s64), [[C4]]
; CHECK: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP2]](s32)
; CHECK: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[C4]](s64), [[C]]
; CHECK: [[TRUNC3:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP3]](s32)
; CHECK: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[OR1]], [[C4]](s64)
; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[OR1]], [[SUB3]](s64)
; CHECK: [[SHL4:%[0-9]+]]:_(s64) = G_SHL [[OR2]], [[C4]](s64)
; CHECK: [[OR3:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL4]]
; CHECK: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[OR1]], [[SUB2]](s64)
; CHECK: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC2]](s1), [[SHL3]], [[C]]
; CHECK: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC2]](s1), [[OR3]], [[SHL5]]
; CHECK: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC3]](s1), [[OR2]], [[SELECT4]]
; CHECK: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SELECT3]], [[LOAD]]
; CHECK: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SELECT5]], [[C]]
; CHECK: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 48
; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[MV]], [[C4]](s64)
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[SHL1]], [[LSHR]]
; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[SHL]], [[ZEXTLOAD]]
; CHECK: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
; CHECK: [[OR2:%[0-9]+]]:_(s64) = G_OR [[C]], [[LOAD]]
; CHECK: [[OR3:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[C]]
; CHECK: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD %ptr(p0) :: (load (s64), align 16)
; CHECK: [[COPY1:%[0-9]+]]:_(p0) = COPY [[PTR_ADD]](p0)
; CHECK: [[ZEXTLOAD1:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY1]](p0) :: (load (s16) from unknown-address + 8, align 8)
; CHECK: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C2]](s64)
; CHECK: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p0) :: (load (s8) from unknown-address + 10, align 2)
; CHECK: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[LOAD3]](s32), [[DEF]](s32)
; CHECK: [[SUB4:%[0-9]+]]:_(s64) = G_SUB [[C3]], [[C4]]
; CHECK: [[SUB5:%[0-9]+]]:_(s64) = G_SUB [[C4]], [[C3]]
; CHECK: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[C3]](s64), [[C4]]
; CHECK: [[TRUNC4:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP4]](s32)
; CHECK: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[C3]](s64), [[C]]
; CHECK: [[TRUNC5:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP5]](s32)
; CHECK: [[SHL6:%[0-9]+]]:_(s64) = G_SHL [[MV1]], [[C3]](s64)
; CHECK: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[MV1]], [[SUB5]](s64)
; CHECK: [[SHL7:%[0-9]+]]:_(s64) = G_SHL [[DEF1]], [[C3]](s64)
; CHECK: [[OR6:%[0-9]+]]:_(s64) = G_OR [[LSHR2]], [[SHL7]]
; CHECK: [[SHL8:%[0-9]+]]:_(s64) = G_SHL [[MV1]], [[SUB4]](s64)
; CHECK: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC4]](s1), [[SHL6]], [[C]]
; CHECK: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC4]](s1), [[OR6]], [[SHL8]]
; CHECK: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC5]](s1), [[DEF1]], [[SELECT7]]
; CHECK: [[OR7:%[0-9]+]]:_(s64) = G_OR [[SELECT6]], [[ZEXTLOAD1]]
; CHECK: [[OR8:%[0-9]+]]:_(s64) = G_OR [[SELECT8]], [[C]]
; CHECK: [[SUB6:%[0-9]+]]:_(s64) = G_SUB [[C4]], [[C4]]
; CHECK: [[SUB7:%[0-9]+]]:_(s64) = G_SUB [[C4]], [[C4]]
; CHECK: [[ICMP6:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[C4]](s64), [[C4]]
; CHECK: [[TRUNC6:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP6]](s32)
; CHECK: [[ICMP7:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[C4]](s64), [[C]]
; CHECK: [[TRUNC7:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP7]](s32)
; CHECK: [[SHL9:%[0-9]+]]:_(s64) = G_SHL [[OR7]], [[C4]](s64)
; CHECK: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[OR7]], [[SUB7]](s64)
; CHECK: [[SHL10:%[0-9]+]]:_(s64) = G_SHL [[OR8]], [[C4]](s64)
; CHECK: [[OR9:%[0-9]+]]:_(s64) = G_OR [[LSHR3]], [[SHL10]]
; CHECK: [[SHL11:%[0-9]+]]:_(s64) = G_SHL [[OR7]], [[SUB6]](s64)
; CHECK: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC6]](s1), [[SHL9]], [[C]]
; CHECK: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC6]](s1), [[OR9]], [[SHL11]]
; CHECK: [[SELECT11:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC7]](s1), [[OR8]], [[SELECT10]]
; CHECK: [[OR10:%[0-9]+]]:_(s64) = G_OR [[SELECT9]], [[LOAD2]]
; CHECK: [[OR11:%[0-9]+]]:_(s64) = G_OR [[SELECT11]], [[C]]
; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[OR4]], [[OR10]]
; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[OR5]], [[OR11]]
; CHECK: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[MV1]], [[C3]](s64)
; CHECK: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[DEF1]], [[C3]](s64)
; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[MV1]], [[C4]](s64)
; CHECK: [[OR4:%[0-9]+]]:_(s64) = G_OR [[SHL3]], [[LSHR1]]
; CHECK: [[OR5:%[0-9]+]]:_(s64) = G_OR [[SHL2]], [[ZEXTLOAD1]]
; CHECK: [[OR6:%[0-9]+]]:_(s64) = G_OR [[C]], [[LOAD2]]
; CHECK: [[OR7:%[0-9]+]]:_(s64) = G_OR [[OR5]], [[C]]
; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[OR2]], [[OR6]]
; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[OR3]], [[OR7]]
; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
; CHECK: [[TRUNC8:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[AND1]](s64)
; CHECK: G_STORE [[COPY2]](s64), %ptr(p0) :: (store (s64), align 16)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[TRUNC8]](s32)
; CHECK: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR [[COPY3]], [[C3]](s64)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[TRUNC]](s32)
; CHECK: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY3]], [[C3]](s64)
; CHECK: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[PTR_ADD]], [[C2]](s64)
; CHECK: G_STORE [[COPY3]](s32), [[PTR_ADD]](p0) :: (store (s16) into unknown-address + 8, align 8)
; CHECK: G_STORE [[LSHR4]](s32), [[PTR_ADD3]](p0) :: (store (s8) into unknown-address + 10, align 2)
; CHECK: G_STORE [[LSHR2]](s32), [[PTR_ADD3]](p0) :: (store (s8) into unknown-address + 10, align 2)
%ptr:_(p0) = COPY $x0
%a:_(s88) = G_LOAD %ptr(p0) :: (load (s88))
%b:_(s88) = G_LOAD %ptr(p0) :: (load (s88))
Expand Down
21 changes: 5 additions & 16 deletions llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir
View file
Expand Up @@ -151,22 +151,11 @@ body: |
; CHECK: [[BSWAP1:%[0-9]+]]:_(s64) = G_BSWAP [[DEF]]
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 40
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
; CHECK: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[C]], [[C2]]
; CHECK: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C2]], [[C]]
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[C]](s64), [[C2]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s32)
; CHECK: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[C]](s64), [[C1]]
; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP1]](s32)
; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[BSWAP1]], [[C]](s64)
; CHECK: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[BSWAP]], [[C]](s64)
; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[BSWAP1]], [[SUB1]](s64)
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]]
; CHECK: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[BSWAP1]], [[SUB]](s64)
; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[OR]], [[LSHR2]]
; CHECK: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC1]](s1), [[BSWAP]], [[SELECT]]
; CHECK: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[LSHR]], [[C1]]
; CHECK: $x0 = COPY [[SELECT1]](s64)
; CHECK: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR [[BSWAP]], [[C]](s64)
; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
; CHECK: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[BSWAP1]], [[C2]](s64)
; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]
; CHECK: $x0 = COPY [[OR]](s64)
; CHECK: RET_ReallyLR implicit $x0
%val:_(s88) = G_IMPLICIT_DEF
%bswap:_(s88) = G_BSWAP %val
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