Skip to content

Commit

Permalink
RegAlloc: Rename MLRegalloc* files to use consistent captalization
Browse files Browse the repository at this point in the history
The other regalloc related files use RegAlloc, not Regalloc.
  • Loading branch information
arsenm committed Sep 3, 2023
1 parent 77c6743 commit 65b40f2
Show file tree
Hide file tree
Showing 28 changed files with 28 additions and 28 deletions.
2 changes: 1 addition & 1 deletion .github/CODEOWNERS
Validating CODEOWNERS rules …
Original file line number Diff line number Diff line change
Expand Up @@ -541,5 +541,5 @@ utils/bazel/llvm-project-overlay/libc/** @llvm/pr-subscribers-libc
/llvm/test/Transforms/inline/ML/ @llvm/pr-subscribers-mlgo
/llvm/lib/CodeGen/ML* @llvm/pr-subscribers-mlgo
/llvm/unittests/CodeGen/ML* @llvm/pr-subscribers-mlgo
/llvm/test/CodeGen/MLRegalloc/ @llvm/pr-subscribers-mlgo
/llvm/test/CodeGen/MLRegAlloc/ @llvm/pr-subscribers-mlgo

2 changes: 1 addition & 1 deletion clang/docs/tools/clang-formatted-files.txt
Original file line number Diff line number Diff line change
Expand Up @@ -5800,7 +5800,7 @@ llvm/lib/CodeGen/MIRPrintingPass.cpp
llvm/lib/CodeGen/MIRSampleProfile.cpp
llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
llvm/lib/CodeGen/MIRYamlMapping.cpp
llvm/lib/CodeGen/MLRegallocEvictAdvisor.cpp
llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
llvm/lib/CodeGen/MultiHazardRecognizer.cpp
llvm/lib/CodeGen/NonRelocatableStringpool.cpp
llvm/lib/CodeGen/ParallelCG.cpp
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Analysis/models/interactive_host.py
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
Examples:
test/Transforms/Inline/ML/interactive-mode.ll
test/CodeGen/MLRegalloc/interactive-mode.ll
test/CodeGen/MLRegAlloc/interactive-mode.ll
"""

import ctypes
Expand Down
8 changes: 4 additions & 4 deletions llvm/lib/CodeGen/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,8 @@ if (DEFINED LLVM_HAVE_TF_AOT OR LLVM_HAVE_TFLITE)
"../Analysis/models/gen-regalloc-eviction-test-model.py"
serve
action
RegallocEvictModel
llvm::RegallocEvictModel
RegAllocEvictModel
llvm::RegAllocEvictModel
)
endif()

Expand Down Expand Up @@ -162,8 +162,8 @@ add_llvm_component_library(LLVMCodeGen
MIRFSDiscriminator.cpp
MIRSampleProfile.cpp
MIRYamlMapping.cpp
MLRegallocEvictAdvisor.cpp
MLRegallocPriorityAdvisor.cpp
MLRegAllocEvictAdvisor.cpp
MLRegAllocPriorityAdvisor.cpp
ModuloSchedule.cpp
MultiHazardRecognizer.cpp
PatchableFunction.cpp
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@
#include "llvm/Analysis/NoInferenceModelRunner.h"
#include "llvm/Analysis/Utils/TrainingLogger.h"
#endif
#include "MLRegallocEvictAdvisor.h"
#include "MLRegAllocEvictAdvisor.h"
#include "llvm/Analysis/ReleaseModeModelRunner.h"
#include "llvm/CodeGen/CalcSpillWeights.h"
#include "llvm/CodeGen/LiveRegMatrix.h"
Expand All @@ -48,8 +48,8 @@ using namespace llvm;

// Generated header in release (AOT) mode
#if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL)
#include "RegallocEvictModel.h"
using CompiledModelType = RegallocEvictModel;
#include "RegAllocEvictModel.h"
using CompiledModelType = RegAllocEvictModel;
#else
using CompiledModelType = NoopSavedModelImpl;
#endif
Expand Down
File renamed without changes.
File renamed without changes.
File renamed without changes.
2 changes: 1 addition & 1 deletion llvm/unittests/CodeGen/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@ add_llvm_unittest(CodeGenTests
TypeTraitsTest.cpp
TargetOptionsTest.cpp
TestAsmPrinter.cpp
MLRegallocDevelopmentFeatures.cpp
MLRegAllocDevelopmentFeatures.cpp
)

add_subdirectory(GlobalISel)
Expand Down
Original file line number Diff line number Diff line change
@@ -1,12 +1,12 @@
//===- MLRegAllocDevelopmentFeatures.cpp - test dev MLRegalloc features ---===//
//===- MLRegAllocDevelopmentFeatures.cpp - test dev MLRegAlloc features ---===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include "../../lib/CodeGen/MLRegallocEvictAdvisor.h"
#include "../../lib/CodeGen/MLRegAllocEvictAdvisor.h"
#include "llvm/Analysis/NoInferenceModelRunner.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
Expand Down Expand Up @@ -42,7 +42,7 @@ struct LRPosInfoIndexes {
size_t PhysReg;
};

class RegallocDevelopmentFeaturesTest : public ::Test {
class RegAllocDevelopmentFeaturesTest : public ::Test {
protected:
SmallVector<LRStartEndInfo>
setupOverlapProblem(const SmallVectorImpl<LRPosInfoIndexes> &Segments,
Expand Down Expand Up @@ -139,7 +139,7 @@ class RegallocDevelopmentFeaturesTest : public ::Test {

// meta tests to ensure that test setup works correctly

TEST_F(RegallocDevelopmentFeaturesTest,
TEST_F(RegAllocDevelopmentFeaturesTest,
MetaOverlapInstructionDistancesAreCorrect) {
SmallVector<LRPosInfoIndexes, 2> OverlapSetup;
OverlapSetup.push_back({0, 5, 0});
Expand All @@ -151,7 +151,7 @@ TEST_F(RegallocDevelopmentFeaturesTest,
ASSERT_EQ(OverlapProblem[0].End.distance(OverlapProblem[1].Begin), 0);
}

TEST_F(RegallocDevelopmentFeaturesTest, MetaSlotIndicesAreValid) {
TEST_F(RegAllocDevelopmentFeaturesTest, MetaSlotIndicesAreValid) {
SmallVector<LRPosInfoIndexes, 1> OverlapSetup;
OverlapSetup.push_back({0, 10, 0});
ilist<IndexListEntry> IndexList;
Expand All @@ -162,7 +162,7 @@ TEST_F(RegallocDevelopmentFeaturesTest, MetaSlotIndicesAreValid) {

// Testing of feature extraction for per-instruction features

TEST_F(RegallocDevelopmentFeaturesTest, InstructionOpcodesAreCorrect) {
TEST_F(RegAllocDevelopmentFeaturesTest, InstructionOpcodesAreCorrect) {
SmallVector<LRPosInfoIndexes, 1> OverlapSetup;
OverlapSetup.push_back({0, ModelMaxSupportedInstructionCount - 1, 0});
ilist<IndexListEntry> IndexList;
Expand All @@ -187,51 +187,51 @@ TEST_F(RegallocDevelopmentFeaturesTest, InstructionOpcodesAreCorrect) {
}
}

TEST_F(RegallocDevelopmentFeaturesTest, FullOverlap) {
TEST_F(RegAllocDevelopmentFeaturesTest, FullOverlap) {
SmallVector<LRPosInfoIndexes, 2> OverlapSetup;
OverlapSetup.push_back({0, ModelMaxSupportedInstructionCount - 1, 0});
OverlapSetup.push_back({0, ModelMaxSupportedInstructionCount - 1, 1});
runOverlapTest(OverlapSetup);
}

TEST_F(RegallocDevelopmentFeaturesTest, PartialOverlap) {
TEST_F(RegAllocDevelopmentFeaturesTest, PartialOverlap) {
SmallVector<LRPosInfoIndexes, 2> OverlapSetup;
OverlapSetup.push_back({0, 20, 0});
OverlapSetup.push_back({15, 30, 1});
runOverlapTest(OverlapSetup);
}

TEST_F(RegallocDevelopmentFeaturesTest, PartialOverlapOpposite) {
TEST_F(RegAllocDevelopmentFeaturesTest, PartialOverlapOpposite) {
SmallVector<LRPosInfoIndexes, 2> OverlapSetup;
OverlapSetup.push_back({15, 30, 1});
OverlapSetup.push_back({0, 20, 0});
runOverlapTest(OverlapSetup);
}

TEST_F(RegallocDevelopmentFeaturesTest, InternalOverlap) {
TEST_F(RegAllocDevelopmentFeaturesTest, InternalOverlap) {
SmallVector<LRPosInfoIndexes, 2> OverlapSetup;
OverlapSetup.push_back({0, 30, 0});
OverlapSetup.push_back({10, 20, 1});
runOverlapTest(OverlapSetup);
}

TEST_F(RegallocDevelopmentFeaturesTest, TripleInternalOverlap) {
TEST_F(RegAllocDevelopmentFeaturesTest, TripleInternalOverlap) {
SmallVector<LRPosInfoIndexes, 3> OverlapSetup;
OverlapSetup.push_back({0, 30, 0});
OverlapSetup.push_back({10, 25, 1});
OverlapSetup.push_back({15, 20, 2});
runOverlapTest(OverlapSetup);
}

TEST_F(RegallocDevelopmentFeaturesTest, InternalMultiOverlap) {
TEST_F(RegAllocDevelopmentFeaturesTest, InternalMultiOverlap) {
SmallVector<LRPosInfoIndexes, 3> OverlapSetup;
OverlapSetup.push_back({0, 45, 0});
OverlapSetup.push_back({30, 40, 1});
OverlapSetup.push_back({35, 60, 2});
runOverlapTest(OverlapSetup);
}

TEST_F(RegallocDevelopmentFeaturesTest, SingleMBBTest) {
TEST_F(RegAllocDevelopmentFeaturesTest, SingleMBBTest) {
NoInferenceModelRunner ModelRunner = setupModelRunner();
SlotIndex CurrentIndex;
// set index to 1 so we can ensure that the mapping actually get set
Expand All @@ -244,7 +244,7 @@ TEST_F(RegallocDevelopmentFeaturesTest, SingleMBBTest) {
ASSERT_EQ(ModelRunner.getTensor<int64_t>(3)[0], 1);
}

TEST_F(RegallocDevelopmentFeaturesTest, MBBFullTruncated) {
TEST_F(RegAllocDevelopmentFeaturesTest, MBBFullTruncated) {
SmallVector<LRPosInfoIndexes, 1> OverlapSetup;
OverlapSetup.push_back({0, ModelMaxSupportedInstructionCount - 1, 0});
ilist<IndexListEntry> IndexList;
Expand Down
4 changes: 2 additions & 2 deletions llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Original file line number Diff line number Diff line change
Expand Up @@ -128,8 +128,8 @@ static_library("CodeGen") {
"MIRSampleProfile.cpp",
"MIRVRegNamerUtils.cpp",
"MIRYamlMapping.cpp",
"MLRegallocEvictAdvisor.cpp",
"MLRegallocPriorityAdvisor.cpp",
"MLRegAllocEvictAdvisor.cpp",
"MLRegAllocPriorityAdvisor.cpp",
"MachineBasicBlock.cpp",
"MachineBlockFrequencyInfo.cpp",
"MachineBlockPlacement.cpp",
Expand Down
2 changes: 1 addition & 1 deletion llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Original file line number Diff line number Diff line change
Expand Up @@ -30,7 +30,7 @@ unittest("CodeGenTests") {
"InstrRefLDVTest.cpp",
"LexicalScopesTest.cpp",
"LowLevelTypeTest.cpp",
"MLRegallocDevelopmentFeatures.cpp",
"MLRegAllocDevelopmentFeatures.cpp",
"MachineBasicBlockTest.cpp",
"MachineInstrBundleIteratorTest.cpp",
"MachineInstrTest.cpp",
Expand Down

0 comments on commit 65b40f2

Please sign in to comment.