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[mlir] Introduce device mapper attribute for
thread_dim_map
and `ma…
…pped to dims` `scf.foreach_thread` defines mapping its loops to processors via an integer array, see an example below. A lowering can use this mapping. However, expressing mapping as an integer array is very confusing, especially when there are multiple levels of parallelism. In addition, the op does not verify the integer array. This change introduces device mapping attribute to make mapping descriptive and verifiable. Then it makes GPU transform dialect use it. ``` scf.foreach_thread (%i, %j) in (%c1, %c2) { scf.foreach_thread (%i2, %j2) in (%c1, %c2) {...} { thread_dim_mapping = [0, 1]} } { thread_dim_mapping = [0, 1]} ``` It first introduces a `DeviceMappingInterface` which is an attribute interface. `scf.foreach_thread` defines its mapping via this interface. A lowering must define its attributes and implement this interface as well. This way gives us a clear validation. The change also introduces two new attributes (`#gpu.thread<x/y/z>` and `#gpu.block<x,y,z>` ). After this change, the above code prints as below, as seen here, this way clarifies the loop mappings. The change also implements consuming of these two new attribute by the transform dialect. Transform dialect binds the outermost loops to the thread blocks and innermost loops to threads. ``` scf.foreach_thread (%i, %j) in (%c1, %c2) { scf.foreach_thread (%i2, %j2) in (%c1, %c2) {...} { thread_dim_mapping = [#gpu.thread<x>, #gpu.thread<y>]} } { thread_dim_mapping = [#gpu.block<x>, #gpu.block<y>]} ``` Reviewed By: ftynse, nicolasvasilache Differential Revision: https://reviews.llvm.org/D137413
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65 changes: 65 additions & 0 deletions
65
mlir/include/mlir/Dialect/GPU/TransformOps/GPUDeviceMappingAttr.td
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//===-- GPUDeviceMappingAttr.td - Attribute definition -----*- tablegen -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// Defines the attribute used to map loops to gpu. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef GPU_DEVICE_MAPPING_ATTR | ||
#define GPU_DEVICE_MAPPING_ATTR | ||
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include "mlir/Dialect/GPU/IR/GPUBase.td" | ||
include "mlir/IR/EnumAttr.td" | ||
include "mlir/Dialect/SCF/IR/DeviceMappingInterface.td" | ||
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def DimX : I64EnumAttrCase<"DimX", 0, "x">; | ||
def DimY : I64EnumAttrCase<"DimY", 1, "y">; | ||
def DimZ : I64EnumAttrCase<"DimZ", 2, "z">; | ||
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def ThreadsEnum : I64EnumAttr<"Threads", "threads for loop mapping", [ | ||
DimX, DimY, DimZ]> { | ||
let cppNamespace = "::mlir::gpu"; | ||
} | ||
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def GPUThreadMappingAttr | ||
: GPU_Attr<"GPUThreadMapping", "thread", [ DeviceMappingAttrInterface ]> { | ||
let parameters = (ins | ||
EnumParameter<ThreadsEnum>:$thread | ||
); | ||
let assemblyFormat = "`<` params `>`"; | ||
let description = [{ | ||
An attribute that allows defining thread parallelism for GPU devices. | ||
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Thread (aka work item) are grouped into a thread blocks where block may be | ||
described by a 1-, 2-, or 3-dimensional rectangle. This attribute indicates | ||
that thread parallelism is desired. It can be consumed by lowering to | ||
generate GPU. | ||
}]; | ||
} | ||
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def BlocksEnum : I64EnumAttr<"Blocks", "threads for loop mapping", [ | ||
DimX, DimY, DimZ]> { | ||
let cppNamespace = "::mlir::gpu"; | ||
} | ||
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def GPUBlockMappingAttr : GPU_Attr<"GPUBlockMapping", "block", [ DeviceMappingAttrInterface ] > { | ||
let parameters = (ins | ||
EnumParameter<BlocksEnum>:$block | ||
); | ||
let assemblyFormat = "`<` params `>`"; | ||
let description = [{ | ||
An attribute that allows defining thread block parallelism for GPU devices. | ||
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Thread blocks (aka work-group) are grouped into a grid where grid may be | ||
described by a 1-, 2-, or 3-dimensional rectangle. This attribute indicates | ||
that thread block parallelism is desired. It can be consumed by lowering to | ||
generate GPU code. | ||
}]; | ||
} | ||
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#endif // GPU_DEVICE_MAPPING_ATTR |
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@@ -1,3 +1,10 @@ | ||
add_mlir_dialect(SCFOps scf Ops) | ||
add_mlir_doc(SCFOps SCFDialect Dialects/ -gen-dialect-doc) | ||
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set(LLVM_TARGET_DEFINITIONS DeviceMappingInterface.td) | ||
mlir_tablegen(DeviceMappingAttrInterface.h.inc -gen-attr-interface-decls) | ||
mlir_tablegen(DeviceMappingAttrInterface.cpp.inc -gen-attr-interface-defs) | ||
mlir_tablegen(DeviceMappingAttributes.h.inc -gen-attrdef-decls) | ||
mlir_tablegen(DeviceMappingAttributes.cpp.inc -gen-attrdef-defs) | ||
add_public_tablegen_target(MLIRDeviceMappingInterfacesIncGen) | ||
add_dependencies(mlir-generic-headers MLIRDeviceMappingInterfacesIncGen) |
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//===- DeviceMappingInterface.h - -------------------------------*- C++ -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// This file contains the definitions of the device mapping interface defined in | ||
// `DeviceMappingInterface.td`. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef MLIR_DEVICEMAPPINGINTERFACE_H | ||
#define MLIR_DEVICEMAPPINGINTERFACE_H | ||
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#include "mlir/IR/OpDefinition.h" | ||
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/// Include the generated interface declarations. | ||
#include "mlir/Dialect/SCF/IR/DeviceMappingAttrInterface.h.inc" | ||
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#endif // MLIR_DEVICEMAPPINGINTERFACE_H |
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mlir/include/mlir/Dialect/SCF/IR/DeviceMappingInterface.td
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//===- DeviceMappingInterface.td - Device mapping interfaces*- tablegen -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// Defines the interfaces for the device mapping specification for the loops. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef MLIR_DEVICEMAPPINGINTERFACE | ||
#define MLIR_DEVICEMAPPINGINTERFACE | ||
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include "mlir/IR/OpBase.td" | ||
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//===----------------------------------------------------------------------===// | ||
// Attribute interfaces | ||
//===----------------------------------------------------------------------===// | ||
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def DeviceMappingAttrInterface : AttrInterface<"DeviceMappingAttrInterface"> { | ||
let cppNamespace = "::mlir"; | ||
let description = [{ | ||
Attribute interface describing how to map a region to a processing unit. | ||
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It is intended to be a generic mechanism for binding regions to execution | ||
units of an actual or virtual device. Each device first expresses its own | ||
mappings, and those mappings must implement this interface. These mappings | ||
can be used by the device-specific code generators and the desired regions | ||
can be connected to the given processing unit. | ||
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Currently, `scf.foreach_thread` uses this interface to express the mapping | ||
of the loops it contains to the GPU's parallelism units such as threads and | ||
thread blocks. | ||
}]; | ||
} | ||
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def DeviceMappingArrayAttr : | ||
TypedArrayAttrBase<DeviceMappingAttrInterface, | ||
"Device Mapping array attribute"> { } | ||
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#endif // MLIR_DEVICEMAPPINGINTERFACE |
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