[X86][SLM] Fix uops for PCLMULQDQ

Based off a recent llvm-exegesis capture and what Intel AoM / Agner reports as well.
llvm · Oct 17, 2021 · 680afaa · 680afaa
1 parent 498c723
commit 680afaa
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Showing 2 changed files with 3 additions and 3 deletions.
diff --git a/llvm/lib/Target/X86/X86ScheduleSLM.td b/llvm/lib/Target/X86/X86ScheduleSLM.td
@@ -453,7 +453,7 @@ defm : SLMWriteResPair<WriteAESIMC,    [SLM_FPC_RSV0], 8, [5]>;
 defm : SLMWriteResPair<WriteAESKeyGen, [SLM_FPC_RSV0], 8, [5]>;
 
 // Carry-less multiplication instructions.
-defm : SLMWriteResPair<WriteCLMul, [SLM_FPC_RSV0], 10, [10]>;
+defm : SLMWriteResPair<WriteCLMul, [SLM_FPC_RSV0], 10, [10], 8, 1>;
 
 def : WriteRes<WriteSystem,     [SLM_FPC_RSV0]> { let Latency = 100; }
 def : WriteRes<WriteMicrocoded, [SLM_FPC_RSV0]> { let Latency = 100; }

diff --git a/llvm/test/tools/llvm-mca/X86/SLM/resources-pclmul.s b/llvm/test/tools/llvm-mca/X86/SLM/resources-pclmul.s
@@ -13,8 +13,8 @@ pclmulqdq     $11, (%rax), %xmm2
 # CHECK-NEXT: [6]: HasSideEffects (U)
 
 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
-# CHECK-NEXT:  1      10    10.00                       pclmulqdq	$11, %xmm0, %xmm2
-# CHECK-NEXT:  1      13    10.00   *                   pclmulqdq	$11, (%rax), %xmm2
+# CHECK-NEXT:  8      10    10.00                       pclmulqdq	$11, %xmm0, %xmm2
+# CHECK-NEXT:  9      13    10.00   *                   pclmulqdq	$11, (%rax), %xmm2
 
 # CHECK:      Resources:
 # CHECK-NEXT: [0]   - SLMDivider