[AArch64] Remove copy/pasted RISC-V extension names from some tests. NFC

llvm · Aug 1, 2023 · 690edea · 690edea
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commit 690edea
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Showing 4 changed files with 8 additions and 12 deletions.
diff --git a/clang/test/Sema/aarch64-sve-vector-exp-ops.c b/clang/test/Sema/aarch64-sve-vector-exp-ops.c
@@ -1,6 +1,5 @@
-// RUN: %clang_cc1 -triple aarch64 -target-feature +f -target-feature +d \
-// RUN:   -target-feature +v -target-feature +zfh  -target-feature +sve -target-feature +zvfh \
-// RUN:   -disable-O0-optnone -o - -fsyntax-only %s -verify 
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sve \
+// RUN:   -disable-O0-optnone -o - -fsyntax-only %s -verify
 // REQUIRES: aarch64-registered-target
 
 #include <arm_sve.h>

diff --git a/clang/test/Sema/aarch64-sve-vector-log-ops.c b/clang/test/Sema/aarch64-sve-vector-log-ops.c
@@ -1,6 +1,5 @@
-// RUN: %clang_cc1 -triple aarch64 -target-feature +f -target-feature +d \
-// RUN:   -target-feature +v -target-feature +zfh  -target-feature +sve -target-feature +zvfh \
-// RUN:   -disable-O0-optnone -o - -fsyntax-only %s -verify 
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sve \
+// RUN:   -disable-O0-optnone -o - -fsyntax-only %s -verify
 // REQUIRES: aarch64-registered-target
 
 #include <arm_sve.h>

diff --git a/clang/test/Sema/aarch64-sve-vector-pow-ops.c b/clang/test/Sema/aarch64-sve-vector-pow-ops.c
@@ -1,6 +1,5 @@
-// RUN: %clang_cc1 -triple aarch64 -target-feature +f -target-feature +d \
-// RUN:   -target-feature +v -target-feature +zfh  -target-feature +sve -target-feature +experimental-zvfh \
-// RUN:   -disable-O0-optnone -o - -fsyntax-only %s -verify 
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sve \
+// RUN:   -disable-O0-optnone -o - -fsyntax-only %s -verify
 // REQUIRES: aarch64-registered-target
 
 #include <arm_sve.h>

diff --git a/clang/test/Sema/aarch64-sve-vector-trig-ops.c b/clang/test/Sema/aarch64-sve-vector-trig-ops.c
@@ -1,6 +1,5 @@
-// RUN: %clang_cc1 -triple aarch64 -target-feature +f -target-feature +d \
-// RUN:   -target-feature +v -target-feature +zfh  -target-feature +sve -target-feature +zvfh \
-// RUN:   -disable-O0-optnone -o - -fsyntax-only %s -verify 
+// RUN: %clang_cc1 -triple aarch64 -target-feature +sve \
+// RUN:   -disable-O0-optnone -o - -fsyntax-only %s -verify
 // REQUIRES: aarch64-registered-target
 
 #include <arm_sve.h>