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[test][HWASAN] Regenerate some HWASAN tests
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Example of the command used to update tests:
```
ninja -C <build_dir> opt && llvm/utils/update_test_checks.py \
  --opt-binary <build_dir>/bin/opt llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
```

Reviewed By: kstoimenov

Differential Revision: https://reviews.llvm.org/D149219
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@vitalybuka
vitalybuka committed Apr 26, 2023
1 parent 1f2d945 commit 6e8ce16
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Showing 20 changed files with 3,167 additions and 784 deletions.
50 changes: 44 additions & 6 deletions llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll
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Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; Test alloca instrumentation when tags are generated by HWASan function.
;
; RUN: opt < %s -passes=hwasan -hwasan-generate-tags-with-calls -S | FileCheck %s
Expand All @@ -8,12 +9,49 @@ target triple = "riscv64-unknown-linux"
declare void @use32(ptr)

define void @test_alloca() sanitize_hwaddress {
; CHECK-LABEL: @test_alloca(
; CHECK: %[[T1:[^ ]*]] = call i8 @__hwasan_generate_tag()
; CHECK: %[[A:[^ ]*]] = zext i8 %[[T1]] to i64
; CHECK: %[[B:[^ ]*]] = ptrtoint ptr %x to i64
; CHECK: %[[C:[^ ]*]] = shl i64 %[[A]], 56
; CHECK: or i64 %[[B]], %[[C]]
; CHECK-LABEL: define void @test_alloca
; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
; CHECK-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP0]], 3
; CHECK-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44
; CHECK-NEXT: [[TMP6:%.*]] = or i64 ptrtoint (ptr @test_alloca to i64), [[TMP5]]
; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP1]] to ptr
; CHECK-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8
; CHECK-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
; CHECK-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8
; CHECK-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
; CHECK-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP15:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP16:%.*]] = zext i8 [[TMP15]] to i64
; CHECK-NEXT: [[TMP17:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP16]], 56
; CHECK-NEXT: [[TMP19:%.*]] = or i64 [[TMP17]], [[TMP18]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP16]] to i8
; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP22:%.*]] = lshr i64 [[TMP21]], 4
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP22]]
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP23]], i32 0
; CHECK-NEXT: store i8 4, ptr [[TMP24]], align 1
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[X]], i32 15
; CHECK-NEXT: store i8 [[TMP20]], ptr [[TMP25]], align 1
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 4
; CHECK-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP27]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 0, i64 1, i1 false)
; CHECK-NEXT: ret void
;

entry:
%x = alloca i32, align 4
Expand Down
137 changes: 96 additions & 41 deletions llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
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Original file line number Diff line number Diff line change
@@ -1,53 +1,108 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; Test alloca instrumentation.
;
; RUN: opt < %s -passes=hwasan -hwasan-with-ifunc=1 -S | FileCheck %s --check-prefixes=CHECK,DYNAMIC-SHADOW,NO-UAR-TAGS
; RUN: opt < %s -passes=hwasan -hwasan-mapping-offset=0 -S | FileCheck %s --check-prefixes=CHECK,ZERO-BASED-SHADOW,NO-UAR-TAGS
; RUN: opt < %s -passes=hwasan -hwasan-with-ifunc=1 -hwasan-uar-retag-to-zero=0 -S | FileCheck %s --check-prefixes=CHECK,DYNAMIC-SHADOW,UAR-TAGS
; RUN: opt < %s -passes=hwasan -hwasan-with-ifunc=1 -S | FileCheck %s --check-prefixes=DYNAMIC-SHADOW
; RUN: opt < %s -passes=hwasan -hwasan-mapping-offset=0 -S | FileCheck %s --check-prefixes=ZERO-BASED-SHADOW
; RUN: opt < %s -passes=hwasan -hwasan-with-ifunc=1 -hwasan-uar-retag-to-zero=0 -S | FileCheck %s --check-prefixes=DYNAMIC-SHADOW-UAR-TAGS

target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "riscv64-unknown-linux"

declare void @use32(ptr)

define void @test_alloca() sanitize_hwaddress !dbg !15 {
; CHECK-LABEL: @test_alloca(
; CHECK: %[[FP:[^ ]*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK: %[[A:[^ ]*]] = ptrtoint ptr %[[FP]] to i64
; CHECK: %[[B:[^ ]*]] = lshr i64 %[[A]], 20
; CHECK: %[[BASE_TAG:[^ ]*]] = xor i64 %[[A]], %[[B]]

; CHECK: %[[X:[^ ]*]] = alloca { i32, [12 x i8] }, align 16
; CHECK: %[[X_TAG:[^ ]*]] = xor i64 %[[BASE_TAG]], 0
; CHECK: %[[X1:[^ ]*]] = ptrtoint ptr %[[X]] to i64
; CHECK: %[[C:[^ ]*]] = shl i64 %[[X_TAG]], 56
; CHECK: %[[D:[^ ]*]] = or i64 %[[X1]], %[[C]]
; CHECK: %[[X_HWASAN:[^ ]*]] = inttoptr i64 %[[D]] to ptr

; CHECK: %[[X_TAG2:[^ ]*]] = trunc i64 %[[X_TAG]] to i8
; CHECK: %[[E:[^ ]*]] = ptrtoint ptr %[[X]] to i64
; CHECK: %[[F:[^ ]*]] = lshr i64 %[[E]], 4
; DYNAMIC-SHADOW: %[[X_SHADOW:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %[[F]]
; ZERO-BASED-SHADOW: %[[X_SHADOW:[^ ]*]] = inttoptr i64 %[[F]] to ptr
; CHECK: %[[X_SHADOW_GEP:[^ ]*]] = getelementptr i8, ptr %[[X_SHADOW]], i32 0
; CHECK: store i8 4, ptr %[[X_SHADOW_GEP]]
; CHECK: %[[X_I8_GEP:[^ ]*]] = getelementptr i8, ptr %[[X]], i32 15
; CHECK: store i8 %[[X_TAG2]], ptr %[[X_I8_GEP]]
; CHECK: call void @llvm.dbg.value(
; CHECK-SAME: metadata !DIArgList(ptr %[[X]], ptr %[[X]])
; CHECK-SAME: metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0,
; CHECK: call void @use32(ptr nonnull %[[X_HWASAN]])

; UAR-TAGS: %[[BASE_TAG_COMPL:[^ ]*]] = xor i64 %[[BASE_TAG]], 255
; UAR-TAGS: %[[X_TAG_UAR:[^ ]*]] = trunc i64 %[[BASE_TAG_COMPL]] to i8
; CHECK: %[[E2:[^ ]*]] = ptrtoint ptr %[[X]] to i64
; CHECK: %[[F2:[^ ]*]] = lshr i64 %[[E2]], 4
; DYNAMIC-SHADOW: %[[X_SHADOW2:[^ ]*]] = getelementptr i8, ptr %.hwasan.shadow, i64 %[[F2]]
; ZERO-BASED-SHADOW: %[[X_SHADOW2:[^ ]*]] = inttoptr i64 %[[F2]] to ptr
; NO-UAR-TAGS: call void @llvm.memset.p0.i64(ptr align 1 %[[X_SHADOW2]], i8 0, i64 1, i1 false)
; UAR-TAGS: call void @llvm.memset.p0.i64(ptr align 1 %[[X_SHADOW2]], i8 %[[X_TAG_UAR]], i64 1, i1 false)
; CHECK: ret void


; DYNAMIC-SHADOW-LABEL: define void @test_alloca
; DYNAMIC-SHADOW-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk !dbg [[DBG7:![0-9]+]] {
; DYNAMIC-SHADOW-NEXT: entry:
; DYNAMIC-SHADOW-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)
; DYNAMIC-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP8]], 4, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP9]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP10]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP11]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP12]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP13]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP14]], !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP15]], i8 0, i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
; ZERO-BASED-SHADOW-LABEL: define void @test_alloca
; ZERO-BASED-SHADOW-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk !dbg [[DBG7:![0-9]+]] {
; ZERO-BASED-SHADOW-NEXT: entry:
; ZERO-BASED-SHADOW-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; ZERO-BASED-SHADOW-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]], !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP8]], 4, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP10]], i32 0, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP11]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP12]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP13]], 4, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP15]], i8 0, i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
; DYNAMIC-SHADOW-UAR-TAGS-LABEL: define void @test_alloca
; DYNAMIC-SHADOW-UAR-TAGS-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk !dbg [[DBG7:![0-9]+]] {
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: entry:
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr @__hwasan_shadow)
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP5:%.*]] = shl i64 [[TMP3]], 56, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP6:%.*]] = or i64 [[TMP4]], [[TMP5]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP8]], 4, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP9]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP10]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: store i8 4, ptr [[TMP11]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: store i8 [[TMP7]], ptr [[TMP12]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP13:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 255, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP14:%.*]] = trunc i64 [[TMP13]] to i8, !dbg [[DBG14]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP15]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP16]], !dbg [[DBG14]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP17]], i8 [[TMP14]], i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-UAR-TAGS-NEXT: ret void, !dbg [[DBG14]]
;
entry:
%x = alloca i32, align 4
call void @llvm.dbg.value(metadata !DIArgList(ptr %x, ptr %x), metadata !22, metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_arg, 1, DW_OP_plus, DW_OP_deref)), !dbg !21
Expand Down
33 changes: 25 additions & 8 deletions llvm/test/Instrumentation/HWAddressSanitizer/RISCV/atomic.ll
View file
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; Test basic address sanitizer instrumentation.
;
; RUN: opt < %s -passes=hwasan -S | FileCheck %s
Expand All @@ -6,21 +7,37 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "riscv64-unknown-linux"

define void @atomicrmw(ptr %ptr) sanitize_hwaddress {
; CHECK-LABEL: @atomicrmw(
; CHECK: call void @llvm.hwasan.check.memaccess.shortgranules({{.*}}, ptr %ptr, i32 19)
; CHECK: atomicrmw add ptr %ptr, i64 1 seq_cst
; CHECK: ret void
; CHECK-LABEL: define void @atomicrmw
; CHECK-SAME: (ptr [[PTR:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[PTR]], i32 19)
; CHECK-NEXT: [[TMP4:%.*]] = atomicrmw add ptr [[PTR]], i64 1 seq_cst, align 8
; CHECK-NEXT: ret void
;

entry:
%0 = atomicrmw add ptr %ptr, i64 1 seq_cst
ret void
}

define void @cmpxchg(ptr %ptr, i64 %compare_to, i64 %new_value) sanitize_hwaddress {
; CHECK-LABEL: @cmpxchg(
; CHECK: call void @llvm.hwasan.check.memaccess.shortgranules({{.*}}, ptr %ptr, i32 19)
; CHECK: cmpxchg ptr %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
; CHECK: ret void
; CHECK-LABEL: define void @cmpxchg
; CHECK-SAME: (ptr [[PTR:%.*]], i64 [[COMPARE_TO:%.*]], i64 [[NEW_VALUE:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
; CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 72057594037927935
; CHECK-NEXT: [[TMP2:%.*]] = or i64 [[TMP1]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP2]], 1
; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP3]], ptr [[PTR]], i32 19)
; CHECK-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[PTR]], i64 [[COMPARE_TO]], i64 [[NEW_VALUE]] seq_cst seq_cst, align 8
; CHECK-NEXT: ret void
;

entry:
%0 = cmpxchg ptr %ptr, i64 %compare_to, i64 %new_value seq_cst seq_cst
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