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[LoongArch] Fix atomic store pointer operand sequence error
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Differential Revision: https://reviews.llvm.org/D137687
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gonglingqin committed Nov 10, 2022
1 parent 04fb3e3 commit 71ec751
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Showing 2 changed files with 40 additions and 30 deletions.
22 changes: 16 additions & 6 deletions llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
Expand Up @@ -1108,10 +1108,20 @@ def atomic_store_unordered_monotonic_32
def atomic_store_unordered_monotonic_64
: unordered_monotonic_store<atomic_store_64>;

defm : StPat<atomic_store_8, ST_B, GPR, GRLenVT>;
defm : StPat<atomic_store_16, ST_H, GPR, GRLenVT>;
defm : StPat<atomic_store_unordered_monotonic_32, ST_W, GPR, i32>,
Requires<[IsLA32]>;
/// AtomicStores

multiclass AtomicStPat<PatFrag StoreOp, LAInst Inst, RegisterClass StTy,
ValueType vt> {
def : Pat<(StoreOp BaseAddr:$ptr, (vt StTy:$val)),
(Inst StTy:$val, BaseAddr:$ptr, 0)>;
def : Pat<(StoreOp (AddLike BaseAddr:$ptr, simm12:$imm12), (vt StTy:$val)),
(Inst StTy:$val, BaseAddr:$ptr, simm12:$imm12)>;
}

defm : AtomicStPat<atomic_store_8, ST_B, GPR, GRLenVT>;
defm : AtomicStPat<atomic_store_16, ST_H, GPR, GRLenVT>;
defm : AtomicStPat<atomic_store_unordered_monotonic_32, ST_W, GPR, i32>,
Requires<[IsLA32]>;

def PseudoAtomicStoreW : Pseudo<(outs GPR:$dst), (ins GPR:$rj, GPR:$rk)>,
PseudoInstExpansion<(AMSWAP_DB_W R0,
Expand All @@ -1129,8 +1139,8 @@ def : Pat<(atomic_store_release_seqcst_64 GPR:$rj, GPR:$rk),
(PseudoAtomicStoreD GPR:$rj, GPR:$rk)>;

defm : LdPat<atomic_load_64, LD_D>;
defm : StPat<atomic_store_unordered_monotonic_32, ST_W, GPR, i64>;
defm : StPat<atomic_store_unordered_monotonic_64, ST_D, GPR, i64>;
defm : AtomicStPat<atomic_store_unordered_monotonic_32, ST_W, GPR, i64>;
defm : AtomicStPat<atomic_store_unordered_monotonic_64, ST_D, GPR, i64>;
} // Predicates = [IsLA64]

/// Atomic Ops
Expand Down
48 changes: 24 additions & 24 deletions llvm/test/CodeGen/LoongArch/ir-instruction/load-store-atomic.ll
Expand Up @@ -76,13 +76,13 @@ define void @store_release_i8(ptr %ptr, i8 signext %v) {
; LA32-LABEL: store_release_i8:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
; LA32-NEXT: st.b $a0, $a1, 0
; LA32-NEXT: st.b $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i8:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
; LA64-NEXT: st.b $a0, $a1, 0
; LA64-NEXT: st.b $a1, $a0, 0
; LA64-NEXT: ret
store atomic i8 %v, ptr %ptr release, align 1
ret void
Expand All @@ -92,13 +92,13 @@ define void @store_release_i16(ptr %ptr, i16 signext %v) {
; LA32-LABEL: store_release_i16:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
; LA32-NEXT: st.h $a0, $a1, 0
; LA32-NEXT: st.h $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i16:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
; LA64-NEXT: st.h $a0, $a1, 0
; LA64-NEXT: st.h $a1, $a0, 0
; LA64-NEXT: ret
store atomic i16 %v, ptr %ptr release, align 2
ret void
Expand All @@ -108,7 +108,7 @@ define void @store_release_i32(ptr %ptr, i32 signext %v) {
; LA32-LABEL: store_release_i32:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
; LA32-NEXT: st.w $a0, $a1, 0
; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_release_i32:
Expand Down Expand Up @@ -143,12 +143,12 @@ define void @store_release_i64(ptr %ptr, i64 %v) {
define void @store_unordered_i8(ptr %ptr, i8 signext %v) {
; LA32-LABEL: store_unordered_i8:
; LA32: # %bb.0:
; LA32-NEXT: st.b $a0, $a1, 0
; LA32-NEXT: st.b $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_unordered_i8:
; LA64: # %bb.0:
; LA64-NEXT: st.b $a0, $a1, 0
; LA64-NEXT: st.b $a1, $a0, 0
; LA64-NEXT: ret
store atomic i8 %v, ptr %ptr unordered, align 1
ret void
Expand All @@ -157,12 +157,12 @@ define void @store_unordered_i8(ptr %ptr, i8 signext %v) {
define void @store_unordered_i16(ptr %ptr, i16 signext %v) {
; LA32-LABEL: store_unordered_i16:
; LA32: # %bb.0:
; LA32-NEXT: st.h $a0, $a1, 0
; LA32-NEXT: st.h $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_unordered_i16:
; LA64: # %bb.0:
; LA64-NEXT: st.h $a0, $a1, 0
; LA64-NEXT: st.h $a1, $a0, 0
; LA64-NEXT: ret
store atomic i16 %v, ptr %ptr unordered, align 2
ret void
Expand All @@ -171,12 +171,12 @@ define void @store_unordered_i16(ptr %ptr, i16 signext %v) {
define void @store_unordered_i32(ptr %ptr, i32 signext %v) {
; LA32-LABEL: store_unordered_i32:
; LA32: # %bb.0:
; LA32-NEXT: st.w $a0, $a1, 0
; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_unordered_i32:
; LA64: # %bb.0:
; LA64-NEXT: st.w $a0, $a1, 0
; LA64-NEXT: st.w $a1, $a0, 0
; LA64-NEXT: ret
store atomic i32 %v, ptr %ptr unordered, align 4
ret void
Expand All @@ -197,7 +197,7 @@ define void @store_unordered_i64(ptr %ptr, i64 %v) {
;
; LA64-LABEL: store_unordered_i64:
; LA64: # %bb.0:
; LA64-NEXT: st.d $a0, $a1, 0
; LA64-NEXT: st.d $a1, $a0, 0
; LA64-NEXT: ret
store atomic i64 %v, ptr %ptr unordered, align 8
ret void
Expand All @@ -206,12 +206,12 @@ define void @store_unordered_i64(ptr %ptr, i64 %v) {
define void @store_monotonic_i8(ptr %ptr, i8 signext %v) {
; LA32-LABEL: store_monotonic_i8:
; LA32: # %bb.0:
; LA32-NEXT: st.b $a0, $a1, 0
; LA32-NEXT: st.b $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_monotonic_i8:
; LA64: # %bb.0:
; LA64-NEXT: st.b $a0, $a1, 0
; LA64-NEXT: st.b $a1, $a0, 0
; LA64-NEXT: ret
store atomic i8 %v, ptr %ptr monotonic, align 1
ret void
Expand All @@ -220,12 +220,12 @@ define void @store_monotonic_i8(ptr %ptr, i8 signext %v) {
define void @store_monotonic_i16(ptr %ptr, i16 signext %v) {
; LA32-LABEL: store_monotonic_i16:
; LA32: # %bb.0:
; LA32-NEXT: st.h $a0, $a1, 0
; LA32-NEXT: st.h $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_monotonic_i16:
; LA64: # %bb.0:
; LA64-NEXT: st.h $a0, $a1, 0
; LA64-NEXT: st.h $a1, $a0, 0
; LA64-NEXT: ret
store atomic i16 %v, ptr %ptr monotonic, align 2
ret void
Expand All @@ -234,12 +234,12 @@ define void @store_monotonic_i16(ptr %ptr, i16 signext %v) {
define void @store_monotonic_i32(ptr %ptr, i32 signext %v) {
; LA32-LABEL: store_monotonic_i32:
; LA32: # %bb.0:
; LA32-NEXT: st.w $a0, $a1, 0
; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_monotonic_i32:
; LA64: # %bb.0:
; LA64-NEXT: st.w $a0, $a1, 0
; LA64-NEXT: st.w $a1, $a0, 0
; LA64-NEXT: ret
store atomic i32 %v, ptr %ptr monotonic, align 4
ret void
Expand All @@ -260,7 +260,7 @@ define void @store_monotonic_i64(ptr %ptr, i64 %v) {
;
; LA64-LABEL: store_monotonic_i64:
; LA64: # %bb.0:
; LA64-NEXT: st.d $a0, $a1, 0
; LA64-NEXT: st.d $a1, $a0, 0
; LA64-NEXT: ret
store atomic i64 %v, ptr %ptr monotonic, align 8
ret void
Expand All @@ -270,14 +270,14 @@ define void @store_seq_cst_i8(ptr %ptr, i8 signext %v) {
; LA32-LABEL: store_seq_cst_i8:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
; LA32-NEXT: st.b $a0, $a1, 0
; LA32-NEXT: st.b $a1, $a0, 0
; LA32-NEXT: dbar 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_seq_cst_i8:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
; LA64-NEXT: st.b $a0, $a1, 0
; LA64-NEXT: st.b $a1, $a0, 0
; LA64-NEXT: dbar 0
; LA64-NEXT: ret
store atomic i8 %v, ptr %ptr seq_cst, align 1
Expand All @@ -288,14 +288,14 @@ define void @store_seq_cst_i16(ptr %ptr, i16 signext %v) {
; LA32-LABEL: store_seq_cst_i16:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
; LA32-NEXT: st.h $a0, $a1, 0
; LA32-NEXT: st.h $a1, $a0, 0
; LA32-NEXT: dbar 0
; LA32-NEXT: ret
;
; LA64-LABEL: store_seq_cst_i16:
; LA64: # %bb.0:
; LA64-NEXT: dbar 0
; LA64-NEXT: st.h $a0, $a1, 0
; LA64-NEXT: st.h $a1, $a0, 0
; LA64-NEXT: dbar 0
; LA64-NEXT: ret
store atomic i16 %v, ptr %ptr seq_cst, align 2
Expand All @@ -306,7 +306,7 @@ define void @store_seq_cst_i32(ptr %ptr, i32 signext %v) {
; LA32-LABEL: store_seq_cst_i32:
; LA32: # %bb.0:
; LA32-NEXT: dbar 0
; LA32-NEXT: st.w $a0, $a1, 0
; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: dbar 0
; LA32-NEXT: ret
;
Expand Down

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