[Hexagon][bolt] Remove unneeded cl::ZeroOrMore for cl::opt options. NFC

Similar to 557efc9
llvm · Jun 4, 2022 · 72f9c69 · 72f9c69
1 parent 734c223
commit 72f9c69
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Showing 6 changed files with 15 additions and 15 deletions.
diff --git a/bolt/lib/Utils/CommandLineOpts.cpp b/bolt/lib/Utils/CommandLineOpts.cpp
@@ -77,7 +77,6 @@ EnableBAT("enable-bat",
   cl::cat(BoltCategory));
 
 cl::opt<bool> RemoveSymtab("remove-symtab", cl::desc("Remove .symtab section"),
-                           cl::init(false), cl::ZeroOrMore,
                            cl::cat(BoltCategory));
 
 cl::opt<unsigned>

diff --git a/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp b/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
@@ -62,10 +62,11 @@ static cl::opt<unsigned>
     MaxORLSize("insert-max-orl", cl::init(4096), cl::Hidden,
                cl::desc("Maximum size of OrderedRegisterList"));
 static cl::opt<unsigned> MaxIFMSize("insert-max-ifmap", cl::init(1024),
-  cl::Hidden, cl::ZeroOrMore, cl::desc("Maximum size of IFMap"));
+                                    cl::Hidden,
+                                    cl::desc("Maximum size of IFMap"));
 
-static cl::opt<bool> OptTiming("insert-timing", cl::init(false), cl::Hidden,
-  cl::ZeroOrMore, cl::desc("Enable timing of insert generation"));
+static cl::opt<bool> OptTiming("insert-timing", cl::Hidden, cl::ZeroOrMore,
+                               cl::desc("Enable timing of insert generation"));
 static cl::opt<bool>
     OptTimingDetail("insert-timing-detail", cl::Hidden,
                     cl::desc("Enable detailed timing of insert "

diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -97,9 +97,9 @@ static cl::opt<bool> BranchRelaxAsmLarge("branch-relax-asm-large",
                                          cl::init(true), cl::Hidden,
                                          cl::desc("branch relax asm"));
 
-static cl::opt<bool> UseDFAHazardRec("dfa-hazard-rec",
-  cl::init(true), cl::Hidden, cl::ZeroOrMore,
-  cl::desc("Use the DFA based hazard recognizer."));
+static cl::opt<bool>
+    UseDFAHazardRec("dfa-hazard-rec", cl::init(true), cl::Hidden,
+                    cl::desc("Use the DFA based hazard recognizer."));
 
 /// Constants for Hexagon instructions.
 const int Hexagon_MEMW_OFFSET_MAX = 4095;

diff --git a/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp b/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
@@ -42,8 +42,8 @@ using namespace llvm;
 static cl::opt<bool> EnableBSBSched("enable-bsb-sched", cl::Hidden,
                                     cl::init(true));
 
-static cl::opt<bool> EnableTCLatencySched("enable-tc-latency-sched",
-  cl::Hidden, cl::ZeroOrMore, cl::init(false));
+static cl::opt<bool> EnableTCLatencySched("enable-tc-latency-sched", cl::Hidden,
+                                          cl::init(false));
 
 static cl::opt<bool>
     EnableDotCurSched("enable-cur-sched", cl::Hidden, cl::init(true),
@@ -69,7 +69,7 @@ static cl::opt<bool> SchedPredsCloser("sched-preds-closer", cl::Hidden,
                                       cl::init(true));
 
 static cl::opt<bool> SchedRetvalOptimization("sched-retval-optimization",
-  cl::Hidden, cl::ZeroOrMore, cl::init(true));
+                                             cl::Hidden, cl::init(true));
 
 static cl::opt<bool> EnableCheckBankConflict(
     "hexagon-check-bank-conflict", cl::Hidden, cl::init(true),

diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
@@ -36,8 +36,8 @@ static cl::opt<bool>
     EnableCExtOpt("hexagon-cext", cl::Hidden, cl::init(true),
                   cl::desc("Enable Hexagon constant-extender optimization"));
 
-static cl::opt<bool> EnableRDFOpt("rdf-opt", cl::Hidden, cl::ZeroOrMore,
-  cl::init(true), cl::desc("Enable RDF-based optimizations"));
+static cl::opt<bool> EnableRDFOpt("rdf-opt", cl::Hidden, cl::init(true),
+                                  cl::desc("Enable RDF-based optimizations"));
 
 static cl::opt<bool> DisableHardwareLoops("disable-hexagon-hwloops",
   cl::Hidden, cl::desc("Disable Hardware Loops for Hexagon target"));

diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
@@ -71,9 +71,9 @@ static cl::opt<bool>
     EnableGenAllInsnClass("enable-gen-insn", cl::Hidden,
                           cl::desc("Generate all instruction with TC"));
 
-static cl::opt<bool> DisableVecDblNVStores("disable-vecdbl-nv-stores",
-  cl::init(false), cl::Hidden, cl::ZeroOrMore,
-  cl::desc("Disable vector double new-value-stores"));
+static cl::opt<bool>
+    DisableVecDblNVStores("disable-vecdbl-nv-stores", cl::Hidden,
+                          cl::desc("Disable vector double new-value-stores"));
 
 extern cl::opt<bool> ScheduleInlineAsm;