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[AArch64] Fix bug in large stack spill slot handling (PR27717)
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Summary:
Fix bug in MachO path where a frame index offset would not be reserved
for handling large frames when an extra non-used callee-save register
was saved.  In the case where the extra register is reserved or not a
GPR (e.g. %FP in the MachO case), this would lead to the register
scavenger later failing when called from PrologEpilogInserter.

Reviewers: t.p.northover

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20185

llvm-svn: 269697
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geoffberry committed May 16, 2016
1 parent cd5efa5 commit 74cb718
Showing 1 changed file with 3 additions and 1 deletion.
4 changes: 3 additions & 1 deletion llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
Expand Up @@ -1126,7 +1126,9 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
// FIXME: the usual format is actually better if unwinding isn't needed.
if (produceCompactUnwindFrame(MF) && !SavedRegs.test(PairedReg)) {
SavedRegs.set(PairedReg);
ExtraCSSpill = true;
if (AArch64::GPR64RegClass.contains(PairedReg) &&
!RegInfo->isReservedReg(MF, PairedReg))
ExtraCSSpill = true;
}
}

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