[X86] Add _mm256_set_m128 and its 5 variants.

Differential Revision: http://reviews.llvm.org/D9855 llvm-svn: 237778
llvm · May 20, 2015 · 7619004 · 7619004
1 parent 627ba89
commit 7619004
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diff --git a/clang/lib/Headers/avxintrin.h b/clang/lib/Headers/avxintrin.h
@@ -1270,4 +1270,34 @@ _mm256_storeu2_m128i(__m128i *__addr_hi, __m128i *__addr_lo, __m256i __a)
   __builtin_ia32_storedqu((char *)__addr_hi, (__v16qi)__v128);
 }
 
+static __inline __m256 __attribute__((__always_inline__, __nodebug__))
+_mm256_set_m128 (__m128 __hi, __m128 __lo) {
+  return (__m256) __builtin_shufflevector(__lo, __hi, 0, 1, 2, 3, 4, 5, 6, 7);
+}
+
+static __inline __m256d __attribute__((__always_inline__, __nodebug__))
+_mm256_set_m128d (__m128d __hi, __m128d __lo) {
+  return (__m256d)_mm256_set_m128((__m128)__hi, (__m128)__lo);
+}
+
+static __inline __m256i __attribute__((__always_inline__, __nodebug__))
+_mm256_set_m128i (__m128i __hi, __m128i __lo) {
+  return (__m256i)_mm256_set_m128((__m128)__hi, (__m128)__lo);
+}
+
+static __inline __m256 __attribute__((__always_inline__, __nodebug__))
+_mm256_setr_m128 (__m128 __lo, __m128 __hi) {
+  return _mm256_set_m128(__hi, __lo);
+}
+
+static __inline __m256d __attribute__((__always_inline__, __nodebug__))
+_mm256_setr_m128d (__m128d __lo, __m128d __hi) {
+  return (__m256d)_mm256_set_m128((__m128)__hi, (__m128)__lo);
+}
+
+static __inline __m256i __attribute__((__always_inline__, __nodebug__))
+_mm256_setr_m128i (__m128i __lo, __m128i __hi) {
+  return (__m256i)_mm256_set_m128((__m128)__hi, (__m128)__lo);
+}
+
 #endif /* __AVXINTRIN_H */
diff --git a/clang/test/CodeGen/avx-shuffle-builtins.c b/clang/test/CodeGen/avx-shuffle-builtins.c
@@ -174,3 +174,38 @@ __m128i test_mm256_extractf128_si256_1(__m256i a) {
   return _mm256_extractf128_si256(a, 1);
 }
 
+__m256 test_mm256_set_m128(__m128 hi, __m128 lo) {
+  // CHECK-LABEL: @test_mm256_set_m128
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  return _mm256_set_m128(hi, lo);
+}
+
+__m256d test_mm256_set_m128d(__m128d hi, __m128d lo) {
+  // CHECK-LABEL: @test_mm256_set_m128d
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  return _mm256_set_m128d(hi, lo);
+}
+
+__m256i test_mm256_set_m128i(__m128i hi, __m128i lo) {
+  // CHECK-LABEL: @test_mm256_set_m128i
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>  
+  return _mm256_set_m128i(hi, lo);
+}
+
+__m256 test_mm256_setr_m128(__m128 hi, __m128 lo) {
+  // CHECK-LABEL: @test_mm256_setr_m128
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  return _mm256_setr_m128(lo, hi);
+}
+
+__m256d test_mm256_setr_m128d(__m128d hi, __m128d lo) {
+  // CHECK-LABEL: @test_mm256_setr_m128d
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  return _mm256_setr_m128d(lo, hi);
+}
+
+__m256i test_mm256_setr_m128i(__m128i hi, __m128i lo) {
+  // CHECK-LABEL: @test_mm256_setr_m128i
+  // CHECK: shufflevector{{.*}}<i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+  return _mm256_setr_m128i(lo, hi);
+}