Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
[NFC] Adding test for clobbering of high registers in Thumb
Prior to the changes from D52010, clobbering Thumb's high registers in inline asm would cause incorrect code to be generated - or an assertion failure for debug builds. Now that the issue is no longer reproducible, this patch adds a MIR test to cover that scenario. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D96335
- Loading branch information
Showing
1 changed file
with
50 additions
and
0 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,50 @@ | ||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py | ||
# RUN: llc -mtriple thumbv6m-arm-none-eabi -run-pass regallocbasic %s -o - | FileCheck %s | ||
# RUN: llc -mtriple thumbv6m-arm-none-eabi -run-pass greedy %s -o - | FileCheck %s | ||
# RUN: llc -mtriple thumbv6m-arm-none-eabi -run-pass regallocfast %s -o - | FileCheck %s --check-prefix=FAST | ||
|
||
... | ||
--- | ||
name: constraint_h | ||
alignment: 2 | ||
tracksRegLiveness: true | ||
registers: | ||
- { id: 0, class: tgpr } | ||
- { id: 1, class: hgpr } | ||
- { id: 2, class: tgpr } | ||
liveins: | ||
- { reg: '$r0', virtual-reg: '%0' } | ||
frameInfo: | ||
maxAlignment: 4 | ||
maxCallFrameSize: 0 | ||
localFrameSize: 4 | ||
stack: | ||
- { id: 0, size: 4, alignment: 4, local-offset: -4 } | ||
machineFunctionInfo: {} | ||
body: | | ||
bb.0.entry: | ||
liveins: $r0 | ||
; CHECK-LABEL: name: constraint_h | ||
; CHECK: liveins: $r0 | ||
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0 | ||
; CHECK: tSTRspi [[COPY]], %stack.0, 0, 14 /* CC::al */, $noreg | ||
; CHECK: [[tLDRspi:%[0-9]+]]:tgpr = tLDRspi %stack.0, 0, 14 /* CC::al */, $noreg | ||
; CHECK: [[COPY1:%[0-9]+]]:hgpr = COPY [[tLDRspi]] | ||
; CHECK: INLINEASM &"mov r12, $0", 1 /* sideeffect attdialect */, 1048585 /* reguse:GPRnoip_and_GPRwithAPSR_NZCVnosp */, [[COPY1]], 12 /* clobber */, implicit-def early-clobber $r12 | ||
; CHECK: tBX_RET 14 /* CC::al */, $noreg | ||
; FAST-LABEL: name: constraint_h | ||
; FAST: liveins: $r0 | ||
; FAST: tSTRspi killed renamable $r0, %stack.0, 0, 14 /* CC::al */, $noreg | ||
; FAST: renamable $r0 = tLDRspi %stack.0, 0, 14 /* CC::al */, $noreg | ||
; FAST: renamable $r8 = COPY killed renamable $r0 | ||
; FAST: INLINEASM &"mov r12, $0", 1 /* sideeffect attdialect */, 1048585 /* reguse:GPRnoip_and_GPRwithAPSR_NZCVnosp */, killed renamable $r8, 12 /* clobber */, implicit-def dead early-clobber $r12 | ||
; FAST: tBX_RET 14 /* CC::al */, $noreg | ||
%0:tgpr = COPY $r0 | ||
tSTRspi %0, %stack.0, 0, 14 /* CC::al */, $noreg | ||
%2:tgpr = tLDRspi %stack.0, 0, 14 /* CC::al */, $noreg | ||
%1:hgpr = COPY %2 | ||
INLINEASM &"mov r12, $0", 1 /* sideeffect attdialect */, 1048585 /* reguse:hGPR */, %1, 12 /* clobber */, implicit-def early-clobber $r12 | ||
tBX_RET 14 /* CC::al */, $noreg | ||
... |