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[ConstraintElim] Support unsigned decomposition of mul/shl nuw..const
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Support decomposition for `mul/shl nuw` with constant operand for unsigned
queries. Those expressions should not wrap in the unsigned sense and can
be added directly to the unsigned system.
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fhahn committed Oct 15, 2022
1 parent bcd9ba2 commit 7c1b80e
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Showing 3 changed files with 32 additions and 17 deletions.
16 changes: 16 additions & 0 deletions llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Expand Up @@ -381,6 +381,22 @@ decompose(Value *V, SmallVector<PreconditionTy, 4> &Preconditions,
return MergeResults(Op0, CI, true);
}

if (match(V, m_NUWShl(m_Value(Op1), m_ConstantInt(CI))) && canUseSExt(CI)) {
int64_t Mult = int64_t(std::pow(int64_t(2), CI->getSExtValue()));
auto Result = decompose(Op1, Preconditions, IsSigned, DL);
for (auto &KV : Result)
KV.Coefficient *= Mult;
return Result;
}

if (match(V, m_NUWMul(m_Value(Op1), m_ConstantInt(CI))) && canUseSExt(CI) &&
(!CI->isNegative())) {
auto Result = decompose(Op1, Preconditions, IsSigned, DL);
for (auto &KV : Result)
KV.Coefficient *= CI->getSExtValue();
return Result;
}

if (match(V, m_NUWSub(m_Value(Op0), m_ConstantInt(CI))) && canUseSExt(CI))
return {{-1 * CI->getSExtValue(), nullptr}, {1, Op0}};
if (match(V, m_NUWSub(m_Value(Op0), m_Value(Op1))))
Expand Down
27 changes: 13 additions & 14 deletions llvm/test/Transforms/ConstraintElimination/mul.ll
Expand Up @@ -50,7 +50,7 @@ define i1 @test_mul_const_nuw_unsigned_3(i8 %start, i8 %high) {
; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[T:%.*]] = icmp ule i8 [[START_ADD_1]], [[START_MUL_2]]
; CHECK-NEXT: ret i1 [[T]]
; CHECK-NEXT: ret i1 true
;
entry:
%start.mul.4 = mul nuw i8 %start, 4
Expand All @@ -73,7 +73,7 @@ define i1 @test_mul_const_nuw_unsigned_4(i8 %start, i8 %high) {
; CHECK-NEXT: [[START_MUL_2:%.*]] = mul nuw i8 [[START]], 2
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[F:%.*]] = icmp ult i8 [[START_ADD_1]], [[START_MUL_2]]
; CHECK-NEXT: ret i1 [[F]]
; CHECK-NEXT: ret i1 false
;
entry:
%start.mul.4 = mul nuw i8 %start, 4
Expand All @@ -96,7 +96,7 @@ define i1 @test_mul_const_nuw_unsigned_5(i8 %start, i8 %high) {
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[T_4:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_MUL_4]]
; CHECK-NEXT: ret i1 [[T_4]]
; CHECK-NEXT: ret i1 true
;
entry:
%start.mul.4 = mul nuw i8 %start, 4
Expand All @@ -118,7 +118,7 @@ define i1 @test_mul_const_nuw_unsigned_6(i8 %start, i8 %high) {
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[F_2:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_MUL_4]]
; CHECK-NEXT: ret i1 [[F_2]]
; CHECK-NEXT: ret i1 false
;
entry:
%start.mul.4 = mul nuw i8 %start, 4
Expand All @@ -142,7 +142,7 @@ define i1 @test_mul_const_nuw_unsigned_7(i8 %start, i8 %high) {
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_1:%.*]] = add nuw i8 [[START_ADD_2]], 1
; CHECK-NEXT: [[F_3:%.*]] = icmp ule i8 [[START_ADD_2_1]], [[START_MUL_4]]
; CHECK-NEXT: ret i1 [[F_3]]
; CHECK-NEXT: ret i1 false
;
entry:
%start.mul.4 = mul nuw i8 %start, 4
Expand Down Expand Up @@ -221,7 +221,7 @@ define i1 @test_mul_const_nuw_unsigned_10(i8 %start, i8 %high) {
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START]], 3
; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_MUL_3]], [[START_MUL_5]]
; CHECK-NEXT: ret i1 [[T_1]]
; CHECK-NEXT: ret i1 true
;
entry:
%start.mul.5 = mul nuw i8 %start, 5
Expand All @@ -241,7 +241,7 @@ define i1 @test_mul_const_nuw_unsigned_11(i8 %start, i8 %high) {
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_MUL_3:%.*]] = mul nuw i8 [[START]], 3
; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_MUL_5]], [[START_MUL_3]]
; CHECK-NEXT: ret i1 [[C_1]]
; CHECK-NEXT: ret i1 false
;
entry:
%start.mul.5 = mul nuw i8 %start, 5
Expand All @@ -261,7 +261,7 @@ define i1 @test_mul_const_nuw_unsigned_12(i8 %start) {
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw i8 [[START]], 5
; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_MUL_3]], [[START_MUL_5]]
; CHECK-NEXT: ret i1 [[T_1]]
; CHECK-NEXT: ret i1 true
;
entry:
%start.mul.3 = mul nuw i8 %start, 3
Expand All @@ -281,7 +281,7 @@ define i1 @test_mul_const_nuw_unsigned_13(i8 %start) {
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_MUL_5:%.*]] = mul nuw i8 [[START]], 5
; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_MUL_5]], [[START_MUL_3]]
; CHECK-NEXT: ret i1 [[F_1]]
; CHECK-NEXT: ret i1 false
;
entry:
%start.mul.3 = mul nuw i8 %start, 3
Expand Down Expand Up @@ -373,7 +373,6 @@ entry:
ret i1 %c.1
}


define i1 @test_mul_add_const_nuw_unsigned_1(i8 %start, i8 %high) {
; CHECK-LABEL: @test_mul_add_const_nuw_unsigned_1(
; CHECK-NEXT: entry:
Expand Down Expand Up @@ -426,7 +425,7 @@ define i1 @test_mul_add_const_nuw_unsigned_3(i8 %start, i8 %high) {
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[T_3:%.*]] = icmp ule i8 [[START_ADD_2]], [[START_MUL_4]]
; CHECK-NEXT: ret i1 [[T_3]]
; CHECK-NEXT: ret i1 true
;
entry:
%add = add nuw i8 %start, 3
Expand All @@ -451,7 +450,7 @@ define i1 @test_mul_add_const_nuw_unsigned_4(i8 %start, i8 %high) {
; CHECK-NEXT: [[START_ADD_1:%.*]] = add nuw i8 [[START]], [[START]]
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[T_4:%.*]] = icmp ult i8 [[START_ADD_2]], [[START_MUL_4]]
; CHECK-NEXT: ret i1 [[T_4]]
; CHECK-NEXT: ret i1 true
;
entry:
%add = add nuw i8 %start, 3
Expand All @@ -477,7 +476,7 @@ define i1 @test_mul_add_const_nuw_unsigned_5(i8 %start, i8 %high) {
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_12:%.*]] = add nuw i8 [[START_ADD_2]], 12
; CHECK-NEXT: [[T_5:%.*]] = icmp ule i8 [[START_ADD_2_12]], [[START_MUL_4]]
; CHECK-NEXT: ret i1 [[T_5]]
; CHECK-NEXT: ret i1 true
;
entry:
%add = add nuw i8 %start, 3
Expand All @@ -503,7 +502,7 @@ define i1 @test_mul_add_const_nuw_unsigned_6(i8 %start, i8 %high) {
; CHECK-NEXT: [[START_ADD_2:%.*]] = add nuw i8 [[START_ADD_1]], [[START_ADD_1]]
; CHECK-NEXT: [[START_ADD_2_13:%.*]] = add nuw i8 [[START_ADD_2]], 13
; CHECK-NEXT: [[F_1:%.*]] = icmp ule i8 [[START_ADD_2_13]], [[START_MUL_4]]
; CHECK-NEXT: ret i1 [[F_1]]
; CHECK-NEXT: ret i1 false
;
entry:
%add = add nuw i8 %start, 3
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/Transforms/ConstraintElimination/shl.ll
Expand Up @@ -220,7 +220,7 @@ define i1 @test_shl_const_nuw_unsigned_10(i8 %start, i8 %high) {
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3
; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_SHL_3]], [[START_SHL_5]]
; CHECK-NEXT: ret i1 [[T_1]]
; CHECK-NEXT: ret i1 true
;
entry:
%start.shl.5 = shl nuw i8 %start, 5
Expand All @@ -240,7 +240,7 @@ define i1 @test_shl_const_nuw_unsigned_11(i8 %start, i8 %high) {
; CHECK-NEXT: call void @llvm.assume(i1 [[C_0]])
; CHECK-NEXT: [[START_SHL_3:%.*]] = shl nuw i8 [[START]], 3
; CHECK-NEXT: [[C_1:%.*]] = icmp ule i8 [[START_SHL_5]], [[START_SHL_3]]
; CHECK-NEXT: ret i1 [[C_1]]
; CHECK-NEXT: ret i1 false
;
entry:
%start.shl.5 = shl nuw i8 %start, 5
Expand All @@ -260,7 +260,7 @@ define i1 @test_shl_const_nuw_unsigned_12(i8 %start) {
; CHECK-NEXT: call void @llvm.assume(i1 [[C_1]])
; CHECK-NEXT: [[START_SHL_5:%.*]] = shl nuw i8 [[START]], 5
; CHECK-NEXT: [[T_1:%.*]] = icmp ule i8 [[START_SHL_3]], [[START_SHL_5]]
; CHECK-NEXT: ret i1 [[T_1]]
; CHECK-NEXT: ret i1 true
;
entry:
%start.shl.3 = shl nuw i8 %start, 3
Expand Down

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