[RISCV][GISel] Add isel patterns for SHXADD with s32 type on RV64.

llvm · Nov 11, 2023 · 7e0bae5 · 7e0bae5
1 parent a93dfb5
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diff --git a/llvm/lib/Target/RISCV/RISCVGISel.td b/llvm/lib/Target/RISCV/RISCVGISel.td
@@ -101,6 +101,12 @@ let Predicates = [HasStdExtZba, IsRV64] in {
 // in SDISel for RV64, which is not the case in GISel.
 def : Pat<(shl (i64 (zext i32:$rs1)), uimm5:$shamt),
           (SLLI_UW GPR:$rs1, uimm5:$shamt)>;
+
+foreach i = {1,2,3} in {
+  defvar shxadd = !cast<Instruction>("SH"#i#"ADD");
+  def : Pat<(i32 (add_non_imm12 (shl GPR:$rs1, (i32 i)), GPR:$rs2)),
+            (shxadd GPR:$rs1, GPR:$rs2)>;
+}
 } // Predicates = [HasStdExtZba, IsRV64]
 
 // Ptr type used in patterns with GlobalISelEmitter

diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/zba-rv64.mir
@@ -249,3 +249,81 @@ body:             |
 
     $x10 = COPY %2(s64)
 ...
+---
+name:            sh1add_s32
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.0.entry:
+    liveins: $x10, $x11
+
+    ; CHECK-LABEL: name: sh1add_s32
+    ; CHECK: liveins: $x10, $x11
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
+    ; CHECK-NEXT: [[SH1ADD:%[0-9]+]]:gpr = SH1ADD [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $x10 = COPY [[SH1ADD]]
+    %0:gprb(s64) = COPY $x10
+    %1:gprb(s64) = COPY $x11
+    %2:gprb(s32) = G_TRUNC %0
+    %3:gprb(s32) = G_TRUNC %1
+    %4:gprb(s32) = G_CONSTANT i32 1
+    %5:gprb(s32) = G_SHL %2, %4
+    %6:gprb(s32) = G_ADD %5, %3
+    %7:gprb(s64) = G_ANYEXT %6
+    $x10 = COPY %7(s64)
+...
+---
+name:            sh2add_s32
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.0.entry:
+    liveins: $x10, $x11
+
+    ; CHECK-LABEL: name: sh2add_s32
+    ; CHECK: liveins: $x10, $x11
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
+    ; CHECK-NEXT: [[SH2ADD:%[0-9]+]]:gpr = SH2ADD [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $x10 = COPY [[SH2ADD]]
+    %0:gprb(s64) = COPY $x10
+    %1:gprb(s64) = COPY $x11
+    %2:gprb(s32) = G_TRUNC %0
+    %3:gprb(s32) = G_TRUNC %1
+    %4:gprb(s32) = G_CONSTANT i32 2
+    %5:gprb(s32) = G_SHL %2, %4
+    %6:gprb(s32) = G_ADD %5, %3
+    %7:gprb(s64) = G_ANYEXT %6
+    $x10 = COPY %7(s64)
+...
+---
+name:            sh3add_s32
+legalized:       true
+regBankSelected: true
+tracksRegLiveness: true
+body:             |
+  bb.0.entry:
+    liveins: $x10, $x11
+
+    ; CHECK-LABEL: name: sh3add_s32
+    ; CHECK: liveins: $x10, $x11
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
+    ; CHECK-NEXT: [[SH3ADD:%[0-9]+]]:gpr = SH3ADD [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $x10 = COPY [[SH3ADD]]
+    %0:gprb(s64) = COPY $x10
+    %1:gprb(s64) = COPY $x11
+    %2:gprb(s32) = G_TRUNC %0
+    %3:gprb(s32) = G_TRUNC %1
+    %4:gprb(s32) = G_CONSTANT i32 3
+    %5:gprb(s32) = G_SHL %2, %4
+    %6:gprb(s32) = G_ADD %5, %3
+    %7:gprb(s64) = G_ANYEXT %6
+    $x10 = COPY %7(s64)
+...