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[Inline Spiller] Consider bundles when marking defs as dead
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Fix bug where the code expects just a single MI, but a series of
bundled MIs need to be handled instead.

The semi-formed bundled are created by SplitKit for the case where
not all lanes are live (buildSingleSubRegCopy). Then the remat
kicks in, and since the values that are copied in the bundle do not
need to be preserved due to the remat (dead defs), all instructions
in the bundle should be marked as dead.

However, only the first one gets marked as dead, which causes the
verifier to complain later with error: "Live range continues after
dead def flag".

Differential Revision: https://reviews.llvm.org/D156999
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piotrAMD committed Oct 26, 2023
1 parent 24865a6 commit 80abbec
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Showing 2 changed files with 31 additions and 3 deletions.
29 changes: 29 additions & 0 deletions llvm/lib/CodeGen/InlineSpiller.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -753,6 +753,35 @@ void InlineSpiller::reMaterializeAll() {
continue;
LLVM_DEBUG(dbgs() << "All defs dead: " << *MI);
DeadDefs.push_back(MI);
// If MI is a bundle header, also try removing copies inside the bundle,
// otherwise the verifier would complain "live range continues after dead
// def flag".
if (MI->isBundledWithSucc() && !MI->isBundledWithPred()) {
MachineBasicBlock::instr_iterator BeginIt = MI->getIterator(),
EndIt = MI->getParent()->instr_end();
++BeginIt; // Skip MI that was already handled.

bool OnlyDeadCopies = true;
for (MachineBasicBlock::instr_iterator It = BeginIt;
It != EndIt && It->isBundledWithPred(); ++It) {

auto DestSrc = TII.isCopyInstr(*It);
bool IsCopyToDeadReg =
DestSrc && DestSrc->Destination->getReg() == Reg;
if (!IsCopyToDeadReg) {
OnlyDeadCopies = false;
break;
}
}
if (OnlyDeadCopies) {
for (MachineBasicBlock::instr_iterator It = BeginIt;
It != EndIt && It->isBundledWithPred(); ++It) {
It->addRegisterDead(Reg, &TRI);
LLVM_DEBUG(dbgs() << "All defs dead: " << *It);
DeadDefs.push_back(&*It);
}
}
}
}
}

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5 changes: 2 additions & 3 deletions llvm/test/CodeGen/AMDGPU/dead_bundle.mir
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn--amdpal -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs=0 -start-before=greedy,0 -stop-after=virtregrewriter,0 -stress-regalloc=5 %s -o - | FileCheck %s
# RUN: llc -mtriple=amdgcn--amdpal -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs=1 -start-before=greedy,0 -stop-after=virtregrewriter,0 -stress-regalloc=5 %s -o - | FileCheck %s

# This test currently fails with verify-machineinstrs=1 due to dead bundle mishandling: "Live range continues after dead def flag".
# This test checks that dead bundles are handled correctly.
---
name: psmain
tracksRegLiveness: true
Expand All @@ -20,7 +20,6 @@ body: |
; CHECK-NEXT: renamable $sgpr1 = KILL undef $sgpr1
; CHECK-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11 = S_BUFFER_LOAD_DWORDX8_IMM undef renamable $sgpr0_sgpr1_sgpr2_sgpr3, 416, 0 :: (dereferenceable invariant load (s256), align 4)
; CHECK-NEXT: dead [[V_CVT_U32_F32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_U32_F32_e64 0, $sgpr4, 0, 0, implicit $mode, implicit $exec
; CHECK-NEXT: SI_SPILL_S256_SAVE renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11, %stack.0, implicit $exec, implicit $sgpr32 :: (store (s256) into %stack.0, align 4, addrspace 5)
; CHECK-NEXT: dead renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19 = IMPLICIT_DEF
; CHECK-NEXT: renamable $sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11 = S_BUFFER_LOAD_DWORDX8_IMM undef renamable $sgpr0_sgpr1_sgpr2_sgpr3, 416, 0 :: (dereferenceable invariant load (s256), align 4)
; CHECK-NEXT: renamable $sgpr3 = COPY killed renamable $sgpr7
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