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[MIPS GlobalISel] Select sqrt
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Select G_FSQRT for MIPS32.

Differential Revision: https://reviews.llvm.org/D62905

llvm-svn: 362692
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Petar Avramovic authored and Petar Avramovic committed Jun 6, 2019
1 parent cff7d2f commit 81132ce
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Showing 6 changed files with 219 additions and 2 deletions.
2 changes: 1 addition & 1 deletion llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
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Expand Up @@ -94,7 +94,7 @@ MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
getActionDefinitionsBuilder(G_FCONSTANT)
.legalFor({s32, s64});

getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FABS})
getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FABS, G_FSQRT})
.legalFor({s32, s64});

getActionDefinitionsBuilder(G_FCMP)
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3 changes: 2 additions & 1 deletion llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
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Expand Up @@ -134,7 +134,8 @@ MipsRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
case G_FSUB:
case G_FMUL:
case G_FDIV:
case G_FABS: {
case G_FABS:
case G_FSQRT:{
unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
assert((Size == 32 || Size == 64) && "Unsupported floating point size");
OperandsMapping = Size == 32 ? &Mips::ValueMappings[Mips::SPRIdx]
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65 changes: 65 additions & 0 deletions llvm/test/CodeGen/Mips/GlobalISel/instruction-select/fsqrt.mir
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@@ -0,0 +1,65 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |

define void @sqrt_f32() {entry: ret void}
define void @sqrt_f64() {entry: ret void}

...
---
name: sqrt_f32
alignment: 2
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: sqrt_f32
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; FP32: [[FSQRT_S:%[0-9]+]]:fgr32 = FSQRT_S [[COPY]]
; FP32: $f0 = COPY [[FSQRT_S]]
; FP32: RetRA implicit $f0
; FP64-LABEL: name: sqrt_f32
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; FP64: [[FSQRT_S:%[0-9]+]]:fgr32 = FSQRT_S [[COPY]]
; FP64: $f0 = COPY [[FSQRT_S]]
; FP64: RetRA implicit $f0
%0:fprb(s32) = COPY $f12
%1:fprb(s32) = G_FSQRT %0
$f0 = COPY %1(s32)
RetRA implicit $f0
...
---
name: sqrt_f64
alignment: 2
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: sqrt_f64
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
; FP32: [[FSQRT_D32_:%[0-9]+]]:afgr64 = FSQRT_D32 [[COPY]]
; FP32: $d0 = COPY [[FSQRT_D32_]]
; FP32: RetRA implicit $d0
; FP64-LABEL: name: sqrt_f64
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
; FP64: [[FSQRT_D64_:%[0-9]+]]:fgr64 = FSQRT_D64 [[COPY]]
; FP64: $d0 = COPY [[FSQRT_D64_]]
; FP64: RetRA implicit $d0
%0:fprb(s64) = COPY $d6
%1:fprb(s64) = G_FSQRT %0
$d0 = COPY %1(s64)
RetRA implicit $d0
...
61 changes: 61 additions & 0 deletions llvm/test/CodeGen/Mips/GlobalISel/legalizer/fsqrt.mir
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@@ -0,0 +1,61 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |

define void @sqrt_f32() {entry: ret void}
define void @sqrt_f64() {entry: ret void}

...
---
name: sqrt_f32
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: sqrt_f32
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP32: [[FSQRT:%[0-9]+]]:_(s32) = G_FSQRT [[COPY]]
; FP32: $f0 = COPY [[FSQRT]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: sqrt_f32
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
; FP64: [[FSQRT:%[0-9]+]]:_(s32) = G_FSQRT [[COPY]]
; FP64: $f0 = COPY [[FSQRT]](s32)
; FP64: RetRA implicit $f0
%0:_(s32) = COPY $f12
%1:_(s32) = G_FSQRT %0
$f0 = COPY %1(s32)
RetRA implicit $f0
...
---
name: sqrt_f64
alignment: 2
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: sqrt_f64
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP32: [[FSQRT:%[0-9]+]]:_(s64) = G_FSQRT [[COPY]]
; FP32: $d0 = COPY [[FSQRT]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: sqrt_f64
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
; FP64: [[FSQRT:%[0-9]+]]:_(s64) = G_FSQRT [[COPY]]
; FP64: $d0 = COPY [[FSQRT]](s64)
; FP64: RetRA implicit $d0
%0:_(s64) = COPY $d6
%1:_(s64) = G_FSQRT %0
$d0 = COPY %1(s64)
RetRA implicit $d0
...
27 changes: 27 additions & 0 deletions llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fsqrt.ll
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@@ -0,0 +1,27 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32,FP32
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32,FP64

declare float @llvm.sqrt.f32(float)
define float @sqrt_f32(float %a) {
; MIPS32-LABEL: sqrt_f32:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: sqrt.s $f0, $f12
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
%0 = call float @llvm.sqrt.f32(float %a)
ret float %0
}

declare double @llvm.sqrt.f64(double)
define double @sqrt_f64(double %a) {
; MIPS32-LABEL: sqrt_f64:
; MIPS32: # %bb.0: # %entry
; MIPS32-NEXT: sqrt.d $f0, $f12
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
entry:
%0 = call double @llvm.sqrt.f64(double %a)
ret double %0
}
63 changes: 63 additions & 0 deletions llvm/test/CodeGen/Mips/GlobalISel/regbankselect/fsqrt.mir
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@@ -0,0 +1,63 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |

define void @sqrt_f32() {entry: ret void}
define void @sqrt_f64() {entry: ret void}

...
---
name: sqrt_f32
alignment: 2
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: sqrt_f32
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP32: [[FSQRT:%[0-9]+]]:fprb(s32) = G_FSQRT [[COPY]]
; FP32: $f0 = COPY [[FSQRT]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: sqrt_f32
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP64: [[FSQRT:%[0-9]+]]:fprb(s32) = G_FSQRT [[COPY]]
; FP64: $f0 = COPY [[FSQRT]](s32)
; FP64: RetRA implicit $f0
%0:_(s32) = COPY $f12
%1:_(s32) = G_FSQRT %0
$f0 = COPY %1(s32)
RetRA implicit $f0
...
---
name: sqrt_f64
alignment: 2
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: sqrt_f64
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP32: [[FSQRT:%[0-9]+]]:fprb(s64) = G_FSQRT [[COPY]]
; FP32: $d0 = COPY [[FSQRT]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: sqrt_f64
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP64: [[FSQRT:%[0-9]+]]:fprb(s64) = G_FSQRT [[COPY]]
; FP64: $d0 = COPY [[FSQRT]](s64)
; FP64: RetRA implicit $d0
%0:_(s64) = COPY $d6
%1:_(s64) = G_FSQRT %0
$d0 = COPY %1(s64)
RetRA implicit $d0
...

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