Skip to content

Commit

Permalink
[X86] Use __builtin_convertvector to implement some of the packed int…
Browse files Browse the repository at this point in the history 
…eger to packed float conversion intrinsics.

I believe this is safe assuming default default FP environment. The conversion might be inexact, but it can never overflow the FP type so this shouldn't be undefined behavior for the uitofp/sitofp instructions.

We already do something similar for scalar conversions.

Differential Revision: https://reviews.llvm.org/D46863

llvm-svn: 332882
  • Loading branch information
@topperc
topperc committed May 21, 2018
1 parent 9a45114 commit 842171d
Show file tree
Hide file tree
Showing 14 changed files with 128 additions and 152 deletions.
7 changes: 0 additions & 7 deletions clang/include/clang/Basic/BuiltinsX86.def
View file
Expand Up @@ -320,7 +320,6 @@ TARGET_BUILTIN(__builtin_ia32_movnti, "vi*i", "n", "sse2")
TARGET_BUILTIN(__builtin_ia32_psadbw128, "V2LLiV16cV16c", "nc", "sse2")
TARGET_BUILTIN(__builtin_ia32_sqrtpd, "V2dV2d", "nc", "sse2")
TARGET_BUILTIN(__builtin_ia32_sqrtsd, "V2dV2d", "nc", "sse2")
TARGET_BUILTIN(__builtin_ia32_cvtdq2ps, "V4fV4i", "nc", "sse2")
TARGET_BUILTIN(__builtin_ia32_cvtpd2dq, "V2LLiV2d", "nc", "sse2")
TARGET_BUILTIN(__builtin_ia32_cvtpd2ps, "V4fV2d", "nc", "sse2")
TARGET_BUILTIN(__builtin_ia32_cvttpd2dq, "V4iV2d", "nc", "sse2")
Expand Down Expand Up @@ -1200,8 +1199,6 @@ TARGET_BUILTIN(__builtin_ia32_cvttpd2udq128_mask, "V4iV2dV4iUc", "nc", "avx512vl
TARGET_BUILTIN(__builtin_ia32_cvttpd2udq256_mask, "V4iV4dV4iUc", "nc", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_cvttps2udq128_mask, "V4iV4fV4iUc", "nc", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_cvttps2udq256_mask, "V8iV8fV8iUc", "nc", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_cvtudq2ps128_mask, "V4fV4iV4fUc", "nc", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_cvtudq2ps256_mask, "V8fV8iV8fUc", "nc", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_expanddf128_mask, "V2dV2dV2dUc", "nc", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_expanddf256_mask, "V4dV4dV4dUc", "nc", "avx512vl")
TARGET_BUILTIN(__builtin_ia32_expanddi128_mask, "V2LLiV2LLiV2LLiUc", "nc", "avx512vl")
Expand Down Expand Up @@ -1363,8 +1360,6 @@ TARGET_BUILTIN(__builtin_ia32_cvtps2qq128_mask, "V2LLiV4fV2LLiUc", "nc", "avx512
TARGET_BUILTIN(__builtin_ia32_cvtps2qq256_mask, "V4LLiV4fV4LLiUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtps2uqq128_mask, "V2LLiV4fV2LLiUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtps2uqq256_mask, "V4LLiV4fV4LLiUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtqq2pd128_mask, "V2dV2LLiV2dUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtqq2pd256_mask, "V4dV4LLiV4dUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtqq2ps128_mask, "V4fV2LLiV4fUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtqq2ps256_mask, "V4fV4LLiV4fUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvttpd2qq128_mask, "V2LLiV2dV2LLiUc", "nc", "avx512vl,avx512dq")
Expand All @@ -1375,8 +1370,6 @@ TARGET_BUILTIN(__builtin_ia32_cvttps2qq128_mask, "V2LLiV4fV2LLiUc", "nc", "avx51
TARGET_BUILTIN(__builtin_ia32_cvttps2qq256_mask, "V4LLiV4fV4LLiUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvttps2uqq128_mask, "V2LLiV4fV2LLiUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvttps2uqq256_mask, "V4LLiV4fV4LLiUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtuqq2pd128_mask, "V2dV2LLiV2dUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtuqq2pd256_mask, "V4dV4LLiV4dUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtuqq2ps128_mask, "V4fV2LLiV4fUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_cvtuqq2ps256_mask, "V4fV4LLiV4fUc", "nc", "avx512vl,avx512dq")
TARGET_BUILTIN(__builtin_ia32_rangepd128_mask, "V2dV2dV2dIiV2dUc", "nc", "avx512vl,avx512dq")
Expand Down
38 changes: 14 additions & 24 deletions clang/lib/Headers/avx512dqintrin.h
View file
Expand Up @@ -361,26 +361,21 @@ _mm512_maskz_cvtps_epu64 (__mmask8 __U, __m256 __A) {

static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_cvtepi64_pd (__m512i __A) {
return (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A,
(__v8df) _mm512_setzero_pd(),
(__mmask8) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512d)__builtin_convertvector((__v8di)__A, __v8df);
}

static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_mask_cvtepi64_pd (__m512d __W, __mmask8 __U, __m512i __A) {
return (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A,
(__v8df) __W,
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
(__v8df)_mm512_cvtepi64_pd(__A),
(__v8df)__W);
}

static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_maskz_cvtepi64_pd (__mmask8 __U, __m512i __A) {
return (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A,
(__v8df) _mm512_setzero_pd(),
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
(__v8df)_mm512_cvtepi64_pd(__A),
(__v8df)_mm512_setzero_pd());
}

#define _mm512_cvt_roundepi64_pd(A, R) __extension__ ({ \
Expand Down Expand Up @@ -596,26 +591,21 @@ _mm512_maskz_cvttps_epu64 (__mmask8 __U, __m256 __A) {

static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_cvtepu64_pd (__m512i __A) {
return (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A,
(__v8df) _mm512_setzero_pd(),
(__mmask8) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512d)__builtin_convertvector((__v8du)__A, __v8df);
}

static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_mask_cvtepu64_pd (__m512d __W, __mmask8 __U, __m512i __A) {
return (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A,
(__v8df) __W,
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
(__v8df)_mm512_cvtepu64_pd(__A),
(__v8df)__W);
}

static __inline__ __m512d __DEFAULT_FN_ATTRS
_mm512_maskz_cvtepu64_pd (__mmask8 __U, __m512i __A) {
return (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A,
(__v8df) _mm512_setzero_pd(),
(__mmask8) __U,
_MM_FROUND_CUR_DIRECTION);
return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U,
(__v8df)_mm512_cvtepu64_pd(__A),
(__v8df)_mm512_setzero_pd());
}

#define _mm512_cvt_roundepu64_pd(A, R) __extension__ ({ \
Expand Down
38 changes: 14 additions & 24 deletions clang/lib/Headers/avx512fintrin.h
View file
Expand Up @@ -3831,28 +3831,23 @@ _mm512_maskz_cvttps_epu32 (__mmask16 __U, __m512 __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_cvtepu32_ps (__m512i __A)
{
return (__m512) __builtin_ia32_cvtudq2ps512_mask ((__v16si) __A,
(__v16sf) _mm512_undefined_ps (),
(__mmask16) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512)__builtin_convertvector((__v16su)__A, __v16sf);
}

static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_mask_cvtepu32_ps (__m512 __W, __mmask16 __U, __m512i __A)
{
return (__m512) __builtin_ia32_cvtudq2ps512_mask ((__v16si) __A,
(__v16sf) __W,
(__mmask16) __U,
_MM_FROUND_CUR_DIRECTION);
return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
(__v16sf)_mm512_cvtepu32_ps(__A),
(__v16sf)__W);
}

static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_maskz_cvtepu32_ps (__mmask16 __U, __m512i __A)
{
return (__m512) __builtin_ia32_cvtudq2ps512_mask ((__v16si) __A,
(__v16sf) _mm512_setzero_ps (),
(__mmask16) __U,
_MM_FROUND_CUR_DIRECTION);
return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
(__v16sf)_mm512_cvtepu32_ps(__A),
(__v16sf)_mm512_setzero_ps());
}

static __inline __m512d __DEFAULT_FN_ATTRS
Expand Down Expand Up @@ -3892,28 +3887,23 @@ _mm512_mask_cvtepi32lo_pd(__m512d __W, __mmask8 __U,__m512i __A)
static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_cvtepi32_ps (__m512i __A)
{
return (__m512) __builtin_ia32_cvtdq2ps512_mask ((__v16si) __A,
(__v16sf) _mm512_undefined_ps (),
(__mmask16) -1,
_MM_FROUND_CUR_DIRECTION);
return (__m512)__builtin_convertvector((__v16si)__A, __v16sf);
}

static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_mask_cvtepi32_ps (__m512 __W, __mmask16 __U, __m512i __A)
{
return (__m512) __builtin_ia32_cvtdq2ps512_mask ((__v16si) __A,
(__v16sf) __W,
(__mmask16) __U,
_MM_FROUND_CUR_DIRECTION);
return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
(__v16sf)_mm512_cvtepi32_ps(__A),
(__v16sf)__W);
}

static __inline__ __m512 __DEFAULT_FN_ATTRS
_mm512_maskz_cvtepi32_ps (__mmask16 __U, __m512i __A)
{
return (__m512) __builtin_ia32_cvtdq2ps512_mask ((__v16si) __A,
(__v16sf) _mm512_setzero_ps (),
(__mmask16) __U,
_MM_FROUND_CUR_DIRECTION);
return (__m512)__builtin_ia32_selectps_512((__mmask16)__U,
(__v16sf)_mm512_cvtepi32_ps(__A),
(__v16sf)_mm512_setzero_ps());
}

static __inline __m512d __DEFAULT_FN_ATTRS
Expand Down
64 changes: 28 additions & 36 deletions clang/lib/Headers/avx512vldqintrin.h
View file
Expand Up @@ -463,44 +463,40 @@ _mm256_maskz_cvtps_epu64 (__mmask8 __U, __m128 __A) {

static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtepi64_pd (__m128i __A) {
return (__m128d) __builtin_ia32_cvtqq2pd128_mask ((__v2di) __A,
(__v2df) _mm_setzero_pd(),
(__mmask8) -1);
return (__m128d)__builtin_convertvector((__v2di)__A, __v2df);
}

static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_mask_cvtepi64_pd (__m128d __W, __mmask8 __U, __m128i __A) {
return (__m128d) __builtin_ia32_cvtqq2pd128_mask ((__v2di) __A,
(__v2df) __W,
(__mmask8) __U);
return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
(__v2df)_mm_cvtepi64_pd(__A),
(__v2df)__W);
}

static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_maskz_cvtepi64_pd (__mmask8 __U, __m128i __A) {
return (__m128d) __builtin_ia32_cvtqq2pd128_mask ((__v2di) __A,
(__v2df) _mm_setzero_pd(),
(__mmask8) __U);
return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
(__v2df)_mm_cvtepi64_pd(__A),
(__v2df)_mm_setzero_pd());
}

static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_cvtepi64_pd (__m256i __A) {
return (__m256d) __builtin_ia32_cvtqq2pd256_mask ((__v4di) __A,
(__v4df) _mm256_setzero_pd(),
(__mmask8) -1);
return (__m256d)__builtin_convertvector((__v4di)__A, __v4df);
}

static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_mask_cvtepi64_pd (__m256d __W, __mmask8 __U, __m256i __A) {
return (__m256d) __builtin_ia32_cvtqq2pd256_mask ((__v4di) __A,
(__v4df) __W,
(__mmask8) __U);
return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
(__v4df)_mm256_cvtepi64_pd(__A),
(__v4df)__W);
}

static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_maskz_cvtepi64_pd (__mmask8 __U, __m256i __A) {
return (__m256d) __builtin_ia32_cvtqq2pd256_mask ((__v4di) __A,
(__v4df) _mm256_setzero_pd(),
(__mmask8) __U);
return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
(__v4df)_mm256_cvtepi64_pd(__A),
(__v4df)_mm256_setzero_pd());
}

static __inline__ __m128 __DEFAULT_FN_ATTRS
Expand Down Expand Up @@ -715,44 +711,40 @@ _mm256_maskz_cvttps_epu64 (__mmask8 __U, __m128 __A) {

static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtepu64_pd (__m128i __A) {
return (__m128d) __builtin_ia32_cvtuqq2pd128_mask ((__v2di) __A,
(__v2df) _mm_setzero_pd(),
(__mmask8) -1);
return (__m128d)__builtin_convertvector((__v2du)__A, __v2df);
}

static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_mask_cvtepu64_pd (__m128d __W, __mmask8 __U, __m128i __A) {
return (__m128d) __builtin_ia32_cvtuqq2pd128_mask ((__v2di) __A,
(__v2df) __W,
(__mmask8) __U);
return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
(__v2df)_mm_cvtepu64_pd(__A),
(__v2df)__W);
}

static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_maskz_cvtepu64_pd (__mmask8 __U, __m128i __A) {
return (__m128d) __builtin_ia32_cvtuqq2pd128_mask ((__v2di) __A,
(__v2df) _mm_setzero_pd(),
(__mmask8) __U);
return (__m128d)__builtin_ia32_selectpd_128((__mmask8)__U,
(__v2df)_mm_cvtepu64_pd(__A),
(__v2df)_mm_setzero_pd());
}

static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_cvtepu64_pd (__m256i __A) {
return (__m256d) __builtin_ia32_cvtuqq2pd256_mask ((__v4di) __A,
(__v4df) _mm256_setzero_pd(),
(__mmask8) -1);
return (__m256d)__builtin_convertvector((__v4du)__A, __v4df);
}

static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_mask_cvtepu64_pd (__m256d __W, __mmask8 __U, __m256i __A) {
return (__m256d) __builtin_ia32_cvtuqq2pd256_mask ((__v4di) __A,
(__v4df) __W,
(__mmask8) __U);
return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
(__v4df)_mm256_cvtepu64_pd(__A),
(__v4df)__W);
}

static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_maskz_cvtepu64_pd (__mmask8 __U, __m256i __A) {
return (__m256d) __builtin_ia32_cvtuqq2pd256_mask ((__v4di) __A,
(__v4df) _mm256_setzero_pd(),
(__mmask8) __U);
return (__m256d)__builtin_ia32_selectpd_256((__mmask8)__U,
(__v4df)_mm256_cvtepu64_pd(__A),
(__v4df)_mm256_setzero_pd());
}

static __inline__ __m128 __DEFAULT_FN_ATTRS
Expand Down
36 changes: 14 additions & 22 deletions clang/lib/Headers/avx512vlintrin.h
View file
Expand Up @@ -2207,48 +2207,40 @@ _mm256_maskz_cvtepu32_pd (__mmask8 __U, __m128i __A) {

static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_cvtepu32_ps (__m128i __A) {
return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,
(__v4sf)
_mm_setzero_ps (),
(__mmask8) -1);
return (__m128)__builtin_convertvector((__v4su)__A, __v4sf);
}

static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_mask_cvtepu32_ps (__m128 __W, __mmask8 __U, __m128i __A) {
return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,
(__v4sf) __W,
(__mmask8) __U);
return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
(__v4sf)_mm_cvtepu32_ps(__A),
(__v4sf)__W);
}

static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_maskz_cvtepu32_ps (__mmask8 __U, __m128i __A) {
return (__m128) __builtin_ia32_cvtudq2ps128_mask ((__v4si) __A,
(__v4sf)
_mm_setzero_ps (),
(__mmask8) __U);
return (__m128)__builtin_ia32_selectps_128((__mmask8)__U,
(__v4sf)_mm_cvtepu32_ps(__A),
(__v4sf)_mm_setzero_ps());
}

static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_cvtepu32_ps (__m256i __A) {
return (__m256) __builtin_ia32_cvtudq2ps256_mask ((__v8si) __A,
(__v8sf)
_mm256_setzero_ps (),
(__mmask8) -1);
return (__m256)__builtin_convertvector((__v8su)__A, __v8sf);
}

static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_mask_cvtepu32_ps (__m256 __W, __mmask8 __U, __m256i __A) {
return (__m256) __builtin_ia32_cvtudq2ps256_mask ((__v8si) __A,
(__v8sf) __W,
(__mmask8) __U);
return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
(__v8sf)_mm256_cvtepu32_ps(__A),
(__v8sf)__W);
}

static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_maskz_cvtepu32_ps (__mmask8 __U, __m256i __A) {
return (__m256) __builtin_ia32_cvtudq2ps256_mask ((__v8si) __A,
(__v8sf)
_mm256_setzero_ps (),
(__mmask8) __U);
return (__m256)__builtin_ia32_selectps_256((__mmask8)__U,
(__v8sf)_mm256_cvtepu32_ps(__A),
(__v8sf)_mm256_setzero_ps());
}

static __inline__ __m128d __DEFAULT_FN_ATTRS
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/Headers/avxintrin.h
View file
Expand Up @@ -2225,7 +2225,7 @@ _mm256_cvtepi32_pd(__m128i __a)
static __inline __m256 __DEFAULT_FN_ATTRS
_mm256_cvtepi32_ps(__m256i __a)
{
return (__m256)__builtin_ia32_cvtdq2ps256((__v8si) __a);
return (__m256)__builtin_convertvector((__v8si)__a, __v8sf);
}

/// Converts a 256-bit vector of [4 x double] into a 128-bit vector of
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/Headers/emmintrin.h
View file
Expand Up @@ -3424,7 +3424,7 @@ _mm_cvttsd_si64(__m128d __a)
static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_cvtepi32_ps(__m128i __a)
{
return __builtin_ia32_cvtdq2ps((__v4si)__a);
return (__m128)__builtin_convertvector((__v4si)__a, __v4sf);
}

/// Converts a vector of [4 x float] into a vector of [4 x i32].
Expand Down
2 changes: 1 addition & 1 deletion clang/test/CodeGen/avx-builtins.c
View file
Expand Up @@ -256,7 +256,7 @@ __m256d test_mm256_cvtepi32_pd(__m128i A) {

__m256 test_mm256_cvtepi32_ps(__m256i A) {
// CHECK-LABEL: test_mm256_cvtepi32_ps
// CHECK: call <8 x float> @llvm.x86.avx.cvtdq2.ps.256(<8 x i32> %{{.*}})
// CHECK: sitofp <8 x i32> %{{.*}} to <8 x float>
return _mm256_cvtepi32_ps(A);
}

Expand Down

0 comments on commit 842171d

Please sign in to comment.