Fix LLVM Sphinx build

This addresses issues found by: https://lab.llvm.org/buildbot/#/builders/30/builds/38760
llvm · Aug 14, 2023 · 87a8e22 · 87a8e22
1 parent fb2264f
commit 87a8e22
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/llvm/docs/GlobalISel/GenericOpcode.rst b/llvm/docs/GlobalISel/GenericOpcode.rst
@@ -656,7 +656,7 @@ G_VECREDUCE_FADD, G_VECREDUCE_FMUL
 These reductions are relaxed variants which may reduce the elements in any order.
 
 G_VECREDUCE_FMAX, G_VECREDUCE_FMIN, G_VECREDUCE_FMAXIMUM, G_VECREDUCE_FMINIMUM
-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
 FMIN/FMAX/FMINIMUM/FMAXIMUM nodes can have flags, for NaN/NoNaN variants.