FileCheck-ize some tests in test/CodeGen/X86/

Patch by Jorge Gorbe! Differential Revision: https://reviews.llvm.org/D29807 llvm-svn: 295386
llvm · Feb 17, 2017 · 8960686 · 8960686
1 parent ee61d35
commit 8960686
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diff --git a/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll b/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | \
-; RUN:   not grep ".byte[[:space:]]*true"
+; RUN: llc < %s -march=x86 | FileCheck %s
 
-@X = global i1 true             ; <i1*> [#uses=0]
+@X = global i1 true
+; CHECK-NOT: .byte true
diff --git a/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll b/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll
@@ -1,18 +1,23 @@
-; RUN: llc < %s -march=x86 | grep "(%esp"
-; RUN: llc < %s -march=x86 | grep "pushl	%ebp" | count 1
-; RUN: llc < %s -march=x86 | grep "popl	%ebp" | count 1
+; RUN: llc < %s -march=x86 | FileCheck %s
 
 declare i8* @llvm.returnaddress(i32)
 
 declare i8* @llvm.frameaddress(i32)
 
 define i8* @test1() {
-        %X = call i8* @llvm.returnaddress( i32 0 )              ; <i8*> [#uses=1]
-        ret i8* %X
+; CHECK-LABEL: test1:
+entry:
+  %X = call i8* @llvm.returnaddress( i32 0 )
+  ret i8* %X
+; CHECK: movl {{.*}}(%esp), %eax
 }
 
 define i8* @test2() {
-        %X = call i8* @llvm.frameaddress( i32 0 )               ; <i8*> [#uses=1]
-        ret i8* %X
+; CHECK-LABEL: test2:
+entry:
+  %X = call i8* @llvm.frameaddress( i32 0 )
+  ret i8* %X
+; CHECK: pushl %ebp
+; CHECK: popl %ebp
 }
 
diff --git a/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll b/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll
@@ -1,5 +1,10 @@
-; RUN: llc < %s -march=x86 | grep -i ESP | not grep sub
+; RUN: llc < %s -march=x86 | FileCheck %s
+
+target triple = "i686-unknown-unknown"
 
 define i32 @test(i32 %X) {
-        ret i32 %X
+; CHECK-LABEL: test:
+entry:
+  ret i32 %X
+; CHECK-NOT: subl %esp
 }
diff --git a/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll b/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll
@@ -3,15 +3,18 @@
 ; is invalid code (there is no correct way to order the instruction).  Check
 ; that we do not fold the load into the sub.
 
-; RUN: llc < %s -march=x86 | not grep sub.*GLOBAL
+; RUN: llc < %s -march=x86 | FileCheck %s
 
-@GLOBAL = external global i32           ; <i32*> [#uses=1]
+@GLOBAL = external global i32
 
 define i32 @test(i32* %P1, i32* %P2, i32* %P3) nounwind {
-        %L = load i32, i32* @GLOBAL          ; <i32> [#uses=1]
-        store i32 12, i32* %P2
-        %Y = load i32, i32* %P3              ; <i32> [#uses=1]
-        %Z = sub i32 %Y, %L             ; <i32> [#uses=1]
-        ret i32 %Z
+; CHECK-LABEL: test:
+entry:
+  %L = load i32, i32* @GLOBAL
+  store i32 12, i32* %P2
+  %Y = load i32, i32* %P3
+  %Z = sub i32 %Y, %L
+  ret i32 %Z
+; CHECK-NOT: {{sub.*GLOBAL}}
 }
 
diff --git a/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll b/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll
@@ -1,5 +1,6 @@
-; RUN: llc < %s -march=x86 | not grep 18446744073709551612
+; RUN: llc < %s -march=x86 | FileCheck %s
 
 @A = external global i32                ; <i32*> [#uses=1]
 @Y = global i32* getelementptr (i32, i32* @A, i32 -1)                ; <i32**> [#uses=0]
+; CHECK-NOT: 18446744073709551612
 
diff --git a/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll b/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll
@@ -1,20 +1,29 @@
-; RUN: llc < %s -march=x86 -mcpu=generic | \
-; RUN:   grep shld | count 1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s
 ;
 ; Check that the isel does not fold the shld, which already folds a load
 ; and has two uses, into a store.
 
-@A = external global i32                ; <i32*> [#uses=2]
+@A = external global i32
 
 define i32 @test5(i32 %B, i8 %C) {
-        %tmp.1 = load i32, i32* @A           ; <i32> [#uses=1]
-        %shift.upgrd.1 = zext i8 %C to i32              ; <i32> [#uses=1]
-        %tmp.2 = shl i32 %tmp.1, %shift.upgrd.1         ; <i32> [#uses=1]
-        %tmp.3 = sub i8 32, %C          ; <i8> [#uses=1]
-        %shift.upgrd.2 = zext i8 %tmp.3 to i32          ; <i32> [#uses=1]
-        %tmp.4 = lshr i32 %B, %shift.upgrd.2            ; <i32> [#uses=1]
-        %tmp.5 = or i32 %tmp.4, %tmp.2          ; <i32> [#uses=2]
-        store i32 %tmp.5, i32* @A
-        ret i32 %tmp.5
+; CHECK-LABEL: test5:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT:    movl A, %eax
+; CHECK-NEXT:    shldl %cl, %edx, %eax
+; CHECK-NEXT:    movl %eax, A
+; CHECK-NEXT:    retl
+entry:
+  %tmp.1 = load i32, i32* @A
+  %shift.upgrd.1 = zext i8 %C to i32
+  %tmp.2 = shl i32 %tmp.1, %shift.upgrd.1
+  %tmp.3 = sub i8 32, %C
+  %shift.upgrd.2 = zext i8 %tmp.3 to i32
+  %tmp.4 = lshr i32 %B, %shift.upgrd.2
+  %tmp.5 = or i32 %tmp.4, %tmp.2
+  store i32 %tmp.5, i32* @A
+  ret i32 %tmp.5
 }